A Hierarchical Distributed Linear Evolutionary System for the Synthesis of 4-bit Reversible Circuits

  • Fatima Zohra Hadjam
  • Claudio Moraga
Part of the Studies in Fuzziness and Soft Computing book series (STUDFUZZ, volume 349)


Even limited to 4-bits reversible functions, the synthesis of optimal reversible circuits becomes an arduous task owing to the extremely large problem space. The current paper tries to answer the following question: is it possible to implement optimal 4-bit reversible circuits without relying on existing partial solutions libraries? A distributed linear genetic programming based-approach (DRIMEP2) is presented. It consists of a hierarchical topology with a new communication policy to allow the evolutionary algorithm to explore and exploit the search space in an efficient way. To test the effectivity and the efficiency of the proposed system, the design of 69 benchmarks (4-bits reversible functions) was performed. With respect to good results available in the literature, a gate count reduction up to 60 % was achieved with an average of 16.82 % (for the two first benchmark groups where the gate count of the circuit was considered by the reference authors) and a quantum cost reduction up to 62.71 % was reached with an average of 10.79 % (for the two remaining benchmark groups where the quantum cost of the circuit was considered by the reference authors).


Main Unit Reversible Function Toffoli Gate Gate Count Optimal Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    Benett, C.H.: Logical reversibility of computation, IBM J. Res. Dev. Vol. 17 (6), 1973, pp. 525–532.MathSciNetCrossRefGoogle Scholar
  2. 2.
    Drechsler, R. and Wille, R: From truth tables to programming languages: progress in the design of reversible circuits, Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, ISMVL ’11, Washington, DC, USA. IEEE Computer Society, 2011, pp. 78–85.Google Scholar
  3. 3.
    Saeedi, S. and Markov, I. L.: Synthesis and optimization of reversible circuits – a survey, ACM Computing Surveys, Vol. 45 (2), February 2013.Google Scholar
  4. 4.
    Lukac, M., Kameyama, M., Miller, M. and Perkowski, M.: High Speed Genetic Algorithms in Quantum Logic Synthesis: Low Level Parallelization vs. Representation. Multiple-Valued Logic & Soft Computing Vol. 20, (1-2), 2012, pp. 89–120.Google Scholar
  5. 5.
    Lukac, M., Perkowski, M. and Kameyama, M.: Evolutionary Quantum Logic Synthesis of Boolean Reversible Logic Circuits Embedded in Ternary Quantum Space using Heuristics, 2011, CoRRabs/1107.3383.Google Scholar
  6. 6.
    Drechsler, R., Finder, A. and Wille, R.: Improving ESOP-Based Synthesis of Reversible Logic Using Evolutionary Algorithms, Proceedings of EvoApplications (2), Berlin, Heidelberg: Springer-Verlag (Lecture Notes in Computer Science, Vol. 6625), 2011, pp. 151-161.Google Scholar
  7. 7.
    Oltean, M.: Evolving Reversible Circuits for the Even-Parity Problem. Applications of Evolutionary Computing, Berlin, Heidelberg: Springer-Verlag (Lecture Notes in Computer Science Vol. 3449), 2005, pp. 225–234.Google Scholar
  8. 8.
    Hadjam, F. Z. and Moraga, C.: A new linear genetic programming based system for reversible digital circuit design: RIMEP2, Technical Report ECSC-2013-FSC-04, European Centre for Soft Computing, 2013, ISSN 2254 - 2736.Google Scholar
  9. 9.
    Spector L.: Automatic Quantum Computer Programming: A Genetic Programming Approach. Boston, MA, Kluwer Academic Publishers, 2006/2007.Google Scholar
  10. 10.
    Golubitsky, O. and Maslov, D.: A Study of Optimal \(4\)-Bit Reversible Toffoli Circuits and their Synthesis, IEEE Transactions on Computers, vol. 61 (9), 2012, pp. 1341–1353.MathSciNetCrossRefGoogle Scholar
  11. 11.
    Prasad, A. K., Shende V. V., Markov, I. L., Hayes, J. P. and Patel, K. N.: Data structures and algorithms for simplifying reversible circuits, J. Emerg. Technol. Comput. Syst. Vol. 2 (4), 2006, pp. 277–293.CrossRefGoogle Scholar
  12. 12.
    Yang, G., Song, X., Hung, W. N. N. and Perkowski, M. A.: Fast synthesis of exact minimal reversible circuits using group theory, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference (’ASP-DAC’), ACM Press, 2005, pp. 1002–1005.Google Scholar
  13. 13.
    [6] Yang, G., Song, X., Hung, W. N. N. and Perkowski, M. A.: Bi-Directional Synthesis for Reversible Circuits, Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI’05), 2005, pp. 14–19.Google Scholar
  14. 14.
    Yang, G., Song, X., Hung, W. N. N. and Perkowski, M. A.: Bi-Directional Synthesis of \(4\)-Bit Reversible Circuits. Comput. J. vol. 51 (2), 2008, pp. 207–215.CrossRefGoogle Scholar
  15. 15.
    Li, Z., Chen, H., Xu, B., Liu, W., Song, X. and Xue, X.: Fast algorithm for \(4\)-qubit reversible logic circuits synthesis, Proceedings of the IEEE Congress on Evolutionary Computation, 2008, pp. 2202–2207.Google Scholar
  16. 16.
    Li, Z., Chen, H., Yang, G. and Liu, W.: Efficient Algorithms for Optimal \(4\)-Bit Reversible Logic System Synthesis, Journal of Applied Mathematics, vol. 2013, Article ID 291410.Google Scholar
  17. 17.
    Szyprowski, M. and Kerntopf, P.: Reducing Quantum Cost in Reversible Toffoli Circuits, Proceedings of the Reed-Muller Workshop, Tuusula, Finland, 2011, pp. 127–136, also available at arXiv:1105.5831 [quant-ph].
  18. 18.
    Szyprowski, M. and Kerntopf, P.: An Approach to Quantum Cost Optimization in Reversible Circuits, Proceedings of the 11th IEEE Conference on Nanotechnology, 2011, pp. 1521–1526.Google Scholar
  19. 19.
    Szyprowski, M. and Kerntopf, P: A study of optimal \(4\)-bit reversible circuit synthesis from mixed-polarity Toffoli gates, Proceedings of the 12th IEEE Conference on Nanotechnology (IEEE-NANO), 2012, Birmingham, pp. 1–6.Google Scholar
  20. 20.
    Szyprowski, M. and Kerntopf, P.: Optimal \(4\)-bit Reversible Mixed-Polarity Toffoli Circuits, In: Reversible Computation, 4th International Workshop, RC 2012, Copenhagen, Denmark, July 2-3, 2012. Revised Papers, Berlin Heidelberg: Springer (Lecture Notes in Computer Science, Vol. 7581), 2013. pp. 138–151.Google Scholar
  21. 21.
    Soeken, M., Wille, R., Dueck, G. W. and Drechsler, R.: Window optimization of reversible and quantum circuits, Proceedings of the IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Vienna, 2010, pp. 341-345.Google Scholar
  22. 22.
    Hadjam, F. Z. and Moraga, C. Fatima: RIMEP2, Evolutionary Design of Reversible Digital Circuits. Submitted. ACM Journal on Emerging Technologies in Computing Systems. Special Issue on Computational Synthetic Biology and Regular Papers. Vol. 11 (3), December 2014 Article No. 27 ACM New York, NY, USA.
  23. 23.
    Maslov, D.: Reversible logic synthesis benchmarks page, 2012. Available at Last accessed July 2012.
  24. 24.
    Barenco, A., Bennett, C.H., Cleve, Di Vincenzo, R., D.P., Margolus, N., Shor, P., Sleator, T., Smolin, J.A. and Weinfurter, H.:Elementary gates for quantum computation. Phys- Rev. A 52, 1995, pp. 3457–3467.Google Scholar
  25. 25.
    Maslov, D. and Dueck, G. W.: Reversible cascades with minimal garbage. IEEE Trans. on CAD, Vol. 23 (11), 2004, pp.1497–1509.Google Scholar
  26. 26.
    Alba, E. and Troya J. M.: A survey of parallel distributed genetic algorithms. Complexity, Vol. 4 (4), 1999, pp. 31–52.MathSciNetCrossRefGoogle Scholar
  27. 27.
    Gustafson, S.: An Analysis of Diversity in Genetic Programming. Ph.D. Dissertation, School of Computer Science and Information Technology, University of Nottingham, Nottingham, U.K., 2004.Google Scholar
  28. 28.
    Munawar, A.; Wahib, M.; Munetomo, M. and Akama, K.: A Survey: Genetic Algorithms and the Fast Evolving World of Parallel Computing. Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008, pp. 897–902.Google Scholar
  29. 29.
    Knysh D. S., Kureichik, V. M.: Parallel genetic algorithms: a survey and problem state of the art. Journal of Computer and Systems Sciences International, Vol. 49 (4), 2010, pp. 579–589.MathSciNetCrossRefGoogle Scholar
  30. 30.
    Sudholt, D.: Parallel Evolutionary Algorithms, in: Kacprzyk, J. and Pedrycz, W. (eds.): Handbook of Computational Intelligence, Berlin Heidelberg: Springer-Verlag, 2015. pp. 929–959.Google Scholar
  31. 31.
    Cantu Paz, E.: A survey of parallel genetic algorithms, Technical Report, Illinois Genetic Algorithms Laboratory, University of Illinois at Urbana Champaign, Urbana, IL. 1997.Google Scholar
  32. 32.
    Nicoara, E. S.: Mechanisms to Avoid the Premature Convergence of Genetic Algorithms. Petroleum - Gas University of Ploiesti, Bulletin Mathematics - I. Vol. 61 (1), 2009, pp. 87–96.Google Scholar
  33. 33.
    Gupta, D. and Ghafir, S.: An Overview of methods maintaining Diversity in Genetic Algorithms, International Journal of Emerging Technology and Advanced Engineering, Vol. 2 (5), May 2012.Google Scholar
  34. 34.
    Den Heijer, E. and Eiben A. E.: Maintaining Population Diversity in Evolutionary Art using Structured Populations, Proceedings of the IEEE Congress on Evolutionary Computation (CEC), Cancun, 2013, pp. 529–536.Google Scholar
  35. 35.
    Hadjam, F. Z.: Tuning of Parameters of a Soft Computing System for the Synthesis of Reversible Circuits. MVLSC, Multiple-Valued Logic & Soft Computing 24.1-4, 2014, p. 341–368.Google Scholar
  36. 36.
    Younes, A.: Detection and Elimination of Non-trivial Reversible Identities. International Journal of Computer Science, Engineering and Applications (IJCSEA) Vol.2 (4), August 2012.Google Scholar
  37. 37.

Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  1. 1.Department of Computer ScienceUniversity Djillali Liabes of Sidi Bel AbbesSidi Bel AbbèsAlgeria

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