The HARMONIA Project: Hardware Monitoring for Automotive Systems-of-Systems

  • Thang Nguyen
  • Ezio Bartocci
  • Dejan Ničković
  • Radu Grosu
  • Stefan Jaksic
  • Konstantin Selyunin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9953)

Abstract

The verification of complex mixed-signal integrated circuit products in the automotive industry accounts for around 60 %–70 % of the total development time. In such scenario, any effort to reduce the design and verification costs and to improve the time-to-market and the product quality will play an important role to boost up the competitiveness of the automotive industry.

The aim of the HARMONIA project is to provide a framework for assertion-based monitoring of automotive systems-of-systems with mixed criticality. It will enable a uniform way to reason about both safety-critical correctness and non-critical robustness properties of such systems. Observers embedded on FPGA hardware will be generated from assertions, and used for monitoring automotive designs emulated on hardware. The project outcome will improve the competitiveness of the automotive application oriented nano and microelectronics industry by reducing verification time and cost in the development process.

Notes

Acknowledgment

This research is supported by the project HARMONIA (845631), funded by a national Austrian grant from FFG (Österreichische Forschungsförderungsgesellschaft) under the program IKT der Zukunft. Ezio Bartocci and Dejan Ničković acknowledge also the support of the EU ICT COST Action IC1402 on Runtime Verification beyond Monitoring (ARVI).

References

  1. 1.
    Bartocci, E., Bortolussi, L., Nenzi, L., Sanguinetti, G.: System design of stochastic models using robustness of temporal properties. Theor. Comput. Sci. 587, 3–25 (2015)MathSciNetCrossRefMATHGoogle Scholar
  2. 2.
    Bartocci, E., Bortolussi, L., Nenzi, L.: A temporal logic approach to modular design of synthetic biological circuits. In: Gupta, A., Henzinger, T.A. (eds.) CMSB 2013. LNCS, vol. 8130, pp. 164–177. Springer, Heidelberg (2013). doi: 10.1007/978-3-642-40708-6_13 CrossRefGoogle Scholar
  3. 3.
    Donzé, A.: Breach, a toolbox for verification and parameter synthesis of hybrid systems. In: Touili, T., Cook, B., Jackson, P. (eds.) CAV 2010. LNCS, vol. 6174, pp. 167–170. Springer, Heidelberg (2010). doi: 10.1007/978-3-642-14295-6_17 CrossRefGoogle Scholar
  4. 4.
    Annpureddy, Y., Liu, C., Fainekos, G., Sankaranarayanan, S.: S-TaLiRo: a tool for temporal logic falsification for hybrid systems. In: Abdulla, P.A., Leino, K.R.M. (eds.) TACAS 2011. LNCS, vol. 6605, pp. 254–257. Springer, Heidelberg (2011). doi: 10.1007/978-3-642-19835-9_21 CrossRefGoogle Scholar
  5. 5.
    Maler, O., Nickovic, D.: Monitoring properties of analog and mixed-signal circuits. Int. J. Softw. Tools Technol. Transfer 15(3), 247–268 (2013)CrossRefGoogle Scholar
  6. 6.
    Jaksic, S., Bartocci, E., Grosu, R., Kloibhofer, R., Nguyen, T., Ničković, D.: From signal temporal logic to FPGA monitors. In: Proceedings of MEMOCODE 2015: The ACM/IEEE International Conference on Formal Methods and Models for Codesign, pp. 218–227. IEEE (2015)Google Scholar
  7. 7.
    Rodionova, A., Bartocci, E., Ničković, D., Grosu, R.: Temporal logic as filtering. In: Proceedings of HSCC 2016: The 19th ACM International Conference on Hybrid Systems: Computation and Control, pp. 11–20. ACM (2016)Google Scholar
  8. 8.
    Donzé, A., Maler, O., Bartocci, E., Nickovic, D., Grosu, R., Smolka, S.: On temporal logic and signal processing. In: Chakraborty, S., Mukund, M. (eds.) ATVA 2012. LNCS, vol. 7561, pp. 92–106. Springer, Heidelberg (2012). doi: 10.1007/978-3-642-33386-6_9 CrossRefGoogle Scholar
  9. 9.
    Bartocci, E., Bortolussi, L., Sanguinetti, G.: Data-driven statistical learning of temporal logic properties. In: Legay, A., Bozga, M. (eds.) FORMATS 2014. LNCS, vol. 8711, pp. 23–37. Springer, Heidelberg (2014). doi: 10.1007/978-3-319-10512-3_3 Google Scholar
  10. 10.
    Bufo, S., Bartocci, E., Sanguinetti, G., Borelli, M., Lucangelo, U., Bortolussi, L.: Temporal logic based monitoring of assisted ventilation in intensive care patients. In: Margaria, T., Steffen, B. (eds.) ISoLA 2014. LNCS, vol. 8803, pp. 391–403. Springer, Heidelberg (2014). doi: 10.1007/978-3-662-45231-8_30 Google Scholar
  11. 11.
    Fainekos, G.E., Pappas, G.J.: Robust sampling for MITL specifications. In: Raskin, J.-F., Thiagarajan, P.S. (eds.) FORMATS 2007. LNCS, vol. 4763, pp. 147–162. Springer, Heidelberg (2007). doi: 10.1007/978-3-540-75454-1_12 CrossRefGoogle Scholar
  12. 12.
    Donzé, A., Maler, O.: Robust satisfaction of temporal logic over real-valued signals. In: Chatterjee, K., Henzinger, T.A. (eds.) FORMATS 2010. LNCS, vol. 6246, pp. 92–106. Springer, Heidelberg (2010). doi: 10.1007/978-3-642-15297-9_9 CrossRefGoogle Scholar
  13. 13.
    Jaksic, S., Bartocci, E., Grosu, R., Ničković, D.: Quantitative monitoring of stl with edit distance. In: Proceedings of RV 2016: The 16th International Conference on Runtime Verification. LNCS (2016, to appear)Google Scholar
  14. 14.
    Bartocci, E., Bortolussi, L., Nenzi, L., Sanguinetti, G.: On the robustness of temporal properties for stochastic models. In: Proceedings of HSB 2013: The Second International Workshop on Hybrid Systems and Biology. EPTCS, vol. 125, pp. 3–19 (2013)Google Scholar
  15. 15.
    Selyunin, K., Nguyen, T., Bartocci, E., Ničković, D., Grosu, R.: Monitoring of MTL specifications with IBM’s spiking-neuron model. In: Proceedings of DATE 2016: The 19th Design, Automation and Test in Europe Conference and Exhibition, pp. 924–929. IEEE (2016)Google Scholar
  16. 16.
    Selyunin, K., Ratasich, D., Bartocci, E., Islam, M.A., Smolka, S.A., Grosu, R.: Neural programming: towards adaptive control in cyber-physical systems. In: Proceedings of CDC 2015: The 54th IEEE Conference on Decision and Control, pp. 6978–6985. IEEE (2015)Google Scholar
  17. 17.
    Pnueli, A., Zaks, A.: On the merits of temporal testers. In: Grumberg, O., Veith, H. (eds.) 25MC Festschrift. LNCS, vol. 5000, pp. 172–195. Springer, Heidelberg (2008). doi: 10.1007/978-3-540-69850-0_11 CrossRefGoogle Scholar
  18. 18.
    Maler, O., Nickovic, D., Pnueli, A.: On synthesizing controllers from bounded-response properties. In: Damm, W., Hermanns, H. (eds.) CAV 2007. LNCS, vol. 4590, pp. 95–107. Springer, Heidelberg (2007). doi: 10.1007/978-3-540-73368-3_12 CrossRefGoogle Scholar
  19. 19.
    Cassidy, A.S., Merolla, P., Arthur, J.V., Esser, S.K., Jackson, B., Alvarez-icaza, R., Datta, P., Sawada, J., Wong, T.M., Feldman, V., Amir, A., dayan Rubin, D.B., Mcquinn, E., Risk, W.P., Modha, D.S.: Cognitive computing building block: a versatile and efficient digital neuron model for neurosynaptic cores. In: Proceedings of IJCNN 2013: The IEEE International Joint Conference on Neural Networks. IEEE (2013)Google Scholar

Copyright information

© Springer International Publishing AG 2016

Authors and Affiliations

  • Thang Nguyen
    • 3
  • Ezio Bartocci
    • 1
  • Dejan Ničković
    • 2
  • Radu Grosu
    • 1
  • Stefan Jaksic
    • 1
    • 2
  • Konstantin Selyunin
    • 1
  1. 1.Technische Universität WienViennaAustria
  2. 2.Austrian Institute of Technology (AIT)ViennaAustria
  3. 3.Infineon Technologies Austria AGVillachAustria

Personalised recommendations