FPGA Implementation of the Flux Tensor Moving Object Detection Method

Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9972)

Abstract

In this paper a hardware implementation in a field programmable gate array (FPGA) device of moving object segmentation using the flux tensor (FT) method is presented. The used algorithm and its parallelized version are described in details. The designed module has been verified on the VC 707 development board with Virtex 7 FPGA device for the following video stream parameters: \(720 \times 576\) @ 50 fps (25 MHz pixel clock), \(1280 \times 720\) @ 50 fps (74.25 MHz pixel clock) and \(1920 \times 1080\) @ 50 fps (148.5 MHz pixel clock). Additionally, the computing performance and power consumption have been estimated. The proposed module outperforms the previous FT implementations both in terms of real-time processing capabilities for high-definition stream, as well as energy efficiency.

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Copyright information

© Springer International Publishing AG 2016

Authors and Affiliations

  1. 1.Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical EngineeringAGH University of Science and TechnologyKrakówPoland

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