Abstract
The Field Programmable Gate Array (FPGA) technology is expected to play a key role in the development of Software Defined Radio (SDR) platforms. To this aim, leveraging the nascent High-Level Synthesis (HLS) tools, a design flow from high-level specifications to Register-Transfer Level (RTL) description can be thought to generate processing blocks that can be reconfigured at run-time. Based on such a flow, this paper describes the architectural exploration of a Fast Fourier Transform (FFT) for Long Term Evolution (LTE) standard. Synthesis results show the tradeoff between reconfiguration time and area that can be achieved with such an approach.
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Higher throughput up to 400 MBytes/s may be reached using a dedicated controller so that reconfiguration time can be reduced.
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© 2016 ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering
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Tran, MT., Gautier, M., Casseau, E. (2016). On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study. In: Noguet, D., Moessner, K., Palicot, J. (eds) Cognitive Radio Oriented Wireless Networks. CrownCom 2016. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 172. Springer, Cham. https://doi.org/10.1007/978-3-319-40352-6_45
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