High-Performance Wideband SDR Channelizers

Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9674)

Abstract

The essential process to analyze signals from multicarrier communication systems is to isolate independent communication channels using a channelizer. To implement a channelizer in software-defined radio systems, the Polyphase Filterbank (PFB) is commonly used. For real-time applications, the PFB has to process the digitized signal faster or equal to its sampling rate. Depending on the underlying hardware, PFB can run on a CPU, a Graphical Processing Unit (GPU), or even a Field-Programmable Gate Arrays (FPGA). CPUs and GPUs are more reconfigurable and scalable platforms than FPGAs. In this paper, we optimize an existing implementation of a CPU-based channelizer and implement a novel GPU-based channelizer. Our proposed solutions deliver an overall improvement of 30 % for the CPU optimization on Intel Core i7-4790 @ 3.60 GHz, and a 3.2-fold improvement for the GPU implementation on AMD R9 290, when compared to the original CPU-based implementation.

Keywords

SDR CPU GPU Channelizer 

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Copyright information

© IFIP International Federation for Information Processing 2016

Authors and Affiliations

  1. 1.University of BernBernSwitzerland
  2. 2.University of FribourgFribourgSwitzerland

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