Performance Analysis of the Kahan-Enhanced Scalar Product on Current Multicore Processors

  • Johannes Hofmann
  • Dietmar Fey
  • Michael Riedmann
  • Jan Eitzinger
  • Georg Hager
  • Gerhard Wellein
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9573)


We investigate the performance characteristics of a numerically enhanced scalar product (dot) kernel loop that uses the Kahan algorithm to compensate for numerical errors, and describe efficient SIMD-vectorized implementations on recent Intel processors. Using low-level instruction analysis and the execution-cache-memory (ECM) performance model we pinpoint the relevant performance bottlenecks for single-core and thread-parallel execution, and predict performance and saturation behavior. We show that the Kahan-enhanced scalar product comes at almost no additional cost compared to the naive (non-Kahan) scalar product if appropriate low-level optimizations, notably SIMD vectorization and unrolling, are applied. We also investigate the impact of architectural changes across four generations of Intel Xeon processors.


Scalar product Kahan algorithm SIMD Performance model Multicore 



We thank Intel Germany for providing an early access Broadwell test system. This work was partially funded by BMBF under grant 01IH13009A (project FEPA), and by the Competence Network for Scientific High Performance Computing in Bavaria (KONWIHR).


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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Johannes Hofmann
    • 1
  • Dietmar Fey
    • 1
  • Michael Riedmann
    • 2
  • Jan Eitzinger
    • 3
  • Georg Hager
    • 3
  • Gerhard Wellein
    • 3
  1. 1.Chair for Computer ArchitectureUniversity Erlangen-NurembergErlangenGermany
  2. 2.AREVA GmbHErlangenGermany
  3. 3.Erlangen Regional Computing Center (RRZE), University Erlangen-NurembergErlangenGermany

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