DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip

  • Philipp WagnerEmail author
  • Thomas Wild
  • Andreas Herkersdorf
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9637)


To find the cause of a functional or non-functional defect (bug) in software running on multi-processor System-on-Chip (MPSoC), developers need insight into the chip. For that, most of today’s SoCs have hardware tracing support. Unfortunately, insight is restricted by the insufficient off-chip bandwidth, a problem which is expected to become more severe in the future as more functionality is integrated on-chip. In this paper, we present a novel tracing system architecture, the diagnosis system “DiaSys.” It moves the analysis of the trace data from the debugging tool on a host PC into the chip, avoiding the off-chip bandwidth bottleneck. To enable on-chip processing, we propose to move away from trace data streams towards self-contained diagnosis events. These events can then be transformed on-chip by processing nodes to increase the information density, and then be transferred off-chip with less bandwidth. We evaluate the concept with a prototype hardware implementation, which we use to find a functional software bug. We show that on-chip trace processing can significantly lower the off-chip bandwidth requirements, while providing insight into the software execution equal to existing tracing solutions.


Debugging Tracing MPSoC SoC architectures 



This work was funded by the Bayerisches Staatsministerium für Wirtschaft und Medien, Energie und Technologie (StMWi) as part of the project “SoC Doctor,” and by the German Research Foundation (DFG) as part of the Transregional Collaborative Research Centre “Invasive Computing” (SFB/TR 89). The responsibility for the content remains with the authors.


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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Philipp Wagner
    • 1
    Email author
  • Thomas Wild
    • 1
  • Andreas Herkersdorf
    • 1
  1. 1.Lehrstuhl für Integrierte SystemeTechnische Universität MünchenMunichGermany

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