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Placement Strategies for Faulty Cells in Module Relocation Based BISR Approach

  • Madhuri Elsa Eapen
  • C. Pradeep
  • Anila Ann Varghese
  • Jisha M. Nair
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 424)

Abstract

Field programmable gate arrays are used as a core component in many safety and mission critical applications. In most cases these systems will be continuously exposed to radiations and change in temperature and pressure. This can result in defects within the IC which leads to malfunctioning or total system failure before mission completion. Traditionally, fault tolerance in FPGA is achieved by using spare cells to replace a faulty cell. Higher fault coverage demands more number of spares. So there is a need to develop a repair strategy with minimal hardware overhead capable to respond to defects without bothering system performance. The paper discusses a Built-in-Self-Repair (BISR) approach for FPGA based reconfigurable systems with limited number of spares, reduced area overhead, routing complexity and maximum resource utilization. The key concept used in this BISR is relocation of reconfigurable modules using dynamic runtime partial reconfiguration. This is an on-line repair method which can be used to handle multiple faults without affecting system functioning and throughput. The efficient placement of relocated module helps handle more number of faults with least area overhead and routing complexity. According to the required lifetime of the system the designer can flexibly use this method to maintain fault coverage until mission completion.

Keywords

Relocation Self-repair FPGA Placement Dynamic runtime partial reconfiguration Multiple faults 

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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  1. 1.Department of Electronics and CommunicationSAINTGITS College of EngineeringKeralaIndia

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