• Moritz SchmidEmail author
  • Oliver Reiche
  • Frank Hannig
  • Jürgen Teich


To ease the burden on developers, Domain-specific languages (DSLs) aim at combining architecture- and domain-specific knowledge, thereby delivering performance, productivity, and portability. HIPAcc is a publicly available framework for the automatic code generation of image processing algorithms on Graphics processing unit (GPU) accelerators. Starting from a C++ embedded DSL, HIPAcc delivers tailored code variants for different target architectures, significantly improving the programmer’s productivity. In this chapter, we use HIPAcc as foundation and extend it to be able to generate C++ code specific to the C-based HLS framework Vivado HLS from Xilinx.


Graphic Processing Unit Optical Flow Memory Window Graphic Processing Unit Implementation Compute Unify Device Architecture 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This work was partly supported by the German Research Foundation (DFG) as part of the Research Training Group 1773 “Heterogeneous Image Systems”.


  1. [HS88]
    C. Harris and M. Stephens. A Combined Corner and Edge Detector. In Proceedings of the 4th Alvey Vision Conference, pages 147–151, 1988.Google Scholar
  2. [MHT+12]
    R. Membarth, F. Hannig, J. Teich, M. Körner, and W. Eckert. Generating device-specific GPU code for local operators in medical imaging. In Proceedings of the 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pages 569–581. IEEE, May 2012.Google Scholar
  3. [MRH+15]
    R. Membarth, O. Reiche, F. Hannig, J. Teich, M. Körner, and W. Eckert. HIPAcc: A domain-specific language and compiler for image processing. IEEE Transactions on Parallel and Distributed Systems, PP(99):1–14, 2015.Google Scholar
  4. [MRHT14]
    R. Membarth, O. Reiche, F. Hannig, and J. Teich. Code generation for embedded heterogeneous architectures on Android. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE), March 2014.Google Scholar
  5. [RSH+14]
    O. Reiche, M. Schmid, F. Hannig, R. Membarth, and J. Teich. Code generation from a domain-specific language for C-based HLS of hardware accelerators. In Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS). ACM, October 2014.Google Scholar
  6. [SAHT14]
    M. Schmid, N. Apelt, F. Hannig, and J. Teich. An image processing library for C-based high-level synthesis. In Proceedings of the 24th International Conference on Field Programmable Logic and Applications (FPL). IEEE, September 2014.Google Scholar
  7. [Ste04]
    F. Stein. Efficient computation of optical flow using the census transform. In Pattern Recognition, volume 3175 of Lecture Notes in Computer Science (LNCS), pages 79–86. Springer, 2004.Google Scholar
  8. [TB01]
    R. Tessier and W. Burleson. Reconfigurable computing for digital signal processing: A survey. Journal of VLSI signal processing systems for signal, image and video technology, 28(1-2):7–27, 2001.CrossRefzbMATHGoogle Scholar

Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Moritz Schmid
    • 1
    Email author
  • Oliver Reiche
    • 1
  • Frank Hannig
    • 1
  • Jürgen Teich
    • 1
  1. 1.Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)ErlangenGermany

Personalised recommendations