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A Hardware Architecture for Calculating LBP-Based Image Region Descriptors

  • Marek KraftEmail author
  • Michał Fularz
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 403)

Abstract

In this paper, an efficient hardware architecture, enabling the computation of LBP-based image region descriptors is presented. The complete region descriptor is formed by combining individual local descriptors and arranging them into a grid, as typically used in object detection and recognition. The proposed solution performs massively parallel, pipelined computations, facilitating the processing of over two hundred VGA frames per second, and can easily be adopted to different window and grid sizes for the use of other descriptors.

Keywords

Programmable logic Hardware accelerator LBP Region descriptor Object recognition Object detection 

Notes

Acknowledgments

This research was financed by the Polish National Science Centre grant funded according to the decision DEC-2011/03/N/ST6/03022, which is gratefully acknowledged.

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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  1. 1.Institute of Control and Information EngineeringPoznan University of TechnologyPoznanPoland

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