Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems

  • Manel AmmarEmail author
  • Mouna Baklouti
  • Maxime Pelcat
  • Karol Desnos
  • Mohamed Abid
Conference paper
Part of the Studies in Computational Intelligence book series (SCI, volume 612)


Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures require efficient programming models and tools to deal with the massive parallelism present within the architecture. In this paper, we propose a tool which automates the generation of the System-Level Architecture Model (S-LAM) from a Unified Modeling Language-based (UML) model annotated with the Modeling and Analysis of Real-Time and Embedded Systems (MARTE) profile. The S-LAM-based description of the MP2SoC architecture is conformed to the IP-XACT standard. The integration of our generator within a co-design framework provides the specification of the whole MP2SoC system using UML and MARTE. Then, gradual refinements allow the execution of a rapid prototyping process.


Design Space Exploration Model Drive Engineer Component Instance Hierarchic Class Transformation Engine 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Manel Ammar
    • 1
    Email author
  • Mouna Baklouti
    • 1
  • Maxime Pelcat
    • 2
  • Karol Desnos
    • 2
  • Mohamed Abid
    • 1
  1. 1.CES LaboratoryNational Engineering School of SfaxSfaxTunisia
  2. 2.IETR, INSA RennesCNRS UMR 6164, UEBRennesFrance

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