Optimal Shuffle Code with Permutation Instructions
During compilation of a program, register allocation is the task of mapping program variables to machine registers. During register allocation, the compiler may introduce shuffle code, consisting of copy and swap operations, that transfers data between the registers. Three common sources of shuffle code are conflicting register mappings at joins in the control flow of the program, e.g, due to if-statements or loops; the calling convention for procedures, which often dictates that input arguments or results must be placed in certain registers; and machine instructions that only allow a subset of registers to occur as operands.
Recently, Mohr et al.  proposed to speed up shuffle code with special hardware instructions that arbitrarily permute the contents of up to five registers and gave a heuristic for computing such shuffle codes.
In this paper, we give an efficient algorithm for generating optimal shuffle code in the setting of Mohr et al. An interesting special case occurs when no register has to be transferred to more than one destination, i.e., it suffices to permute the contents of the registers. This case is equivalent to factoring a permutation into a minimal product of permutations, each of which permutes up to five elements.
KeywordsGreedy Algorithm Transition Graph Outgoing Edge Directed Cycle Calling Convention
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- 1.Blazy, S., Robillard, B.: Live-range unsplitting for faster optimal coalescing. In: Languages, Compilers, and Tools for Embedded Systems (LCTES 2009), pp. 70–79. ACM (2009)Google Scholar
- 2.Bouchez, F., Darte, A., Rastello, F.: On the complexity of register coalescing. In: Code Generation and Optimization (CGO 2007), pp. 102–114. IEEE (2007)Google Scholar
- 3.Buchwald, S., Mohr, M., Rutter, I.: Optimal shuffle code with permutation instructions. CoRR abs/1504.07073 (2015). http://arxiv.org/abs/1504.07073
- 4.Caprara, A.: Sorting by reversals is difficult. In: Computational Molecular Biology (RECOMB 1997), pp. 75–83. ACM (1997)Google Scholar
- 7.Hack, S.: Register Allocation for Programs in SSA Form. Ph.D. thesis, Universität Karlsruhe (2007). http://digbib.ubka.uni-karlsruhe.de/volltexte/documents/6532
- 9.Mohr, M., Grudnitsky, A., Modschiedler, T., Bauer, L., Hack, S., Henkel, J.: Hardware acceleration for programs in SSA form. In: Compilers, Architecture and Synthesis for Embedded Systems (CASES 2013). ACM (2013)Google Scholar
- 10.Seress, Á.: Permutation Group Algorithms, vol. 152. Cambridge University Press (2003)Google Scholar