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Measuring with Timed Patterns

  • Thomas Ferrère
  • Oded Maler
  • Dejan Ničković
  • Dogan Ulus
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9207)

Abstract

We propose a declarative measurement specification language for quantitative performance evaluation of hybrid (discrete-continuous) systems based on simulation traces. We use timed regular expressions with events to specify patterns that define segments of simulation traces over which measurements are to be taken. In addition, we associate measure specifications over these patterns to describe a particular type of performance evaluation (maximization, average, etc.) to be done over the matched signal segments. The resulting language enables expressive and versatile specification of measurement objectives. We develop an algorithm for our measurement framework, implement it in a prototype tool, and apply it in a case study of an automotive communication protocol. Our experiments demonstrate that the proposed technique is usable with very low overhead to a typical (computationally intensive) simulation.

Keywords

Regular Expression Power Pulse Hybrid Automaton Signal Segment Discovery Mode 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgements

This work was supported by ANR project CADMIDIA, and the MISTRAL project A-1341-RT-GP coordinated by the European Defence Agency (EDA) and funded by 8 contributing Members (France, Germany, Italy, Poland, Austria, Sweden, Netherlands and Luxembourg) in the framework of the Joint Investment Programme on Second Innovative Concepts and Emerging Technologies (JIP-ICET 2).

References

  1. 1.
    Alur, R., Etessami, K., La Torre, S., Peled, D.: Parametric temporal logic for model measuring. ACM Trans. Comput. Logic (TOCL) 2(3), 388–407 (2001)CrossRefGoogle Scholar
  2. 2.
    Asarin, E., Caspi, P., Maler, O.: A Kleene theorem for timed automata. In: Logic in Computer Science (LICS), pp. 160–171 (1997)Google Scholar
  3. 3.
    Asarin, E., Caspi, P., Maler, O.: Timed regular expressions. J. ACM 49(2), 172–206 (2002)MathSciNetCrossRefGoogle Scholar
  4. 4.
    Asarin, E., Donzé, A., Maler, O., Nickovic, D.: Parametric identification of temporal properties. In: Khurshid, S., Sen, K. (eds.) Runtime Verification. LNCS, vol. 7186, pp. 147–160. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  5. 5.
    Bozga, M., Graf, S., Mounier, L.: IF-2.0: a validation environment for component-based real-time systems. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, pp. 343–348. Springer, Heidelberg (2002) CrossRefGoogle Scholar
  6. 6.
    Chatterjee, K., Doyen, L., Henzinger, T.A.: Quantitative languages. ACM Trans. Comput. Logic (TOCL) 11(4), 23 (2010)MathSciNetCrossRefGoogle Scholar
  7. 7.
    Bruto da Costa, A.A., Dasgupta, P.: Formal interpretation of assertion-based features on AMS designs. IEEE Des. Test 32(1), 9–17 (2015)Google Scholar
  8. 8.
    Donzé, A., Ferrère, T., Maler, O.: Efficient robust monitoring for STL. In: Sharygina, N., Veith, H. (eds.) CAV 2013. LNCS, vol. 8044, pp. 264–279. Springer, Heidelberg (2013) CrossRefGoogle Scholar
  9. 9.
    Donzé, A., Maler, O.: Robust satisfaction of temporal logic over real-valued signals. In: Chatterjee, K., Henzinger, T.A. (eds.) FORMATS 2010. LNCS, vol. 6246, pp. 92–106. Springer, Heidelberg (2010) CrossRefGoogle Scholar
  10. 10.
    Eisner, C., Fisman, D.: A Practical Introduction to PSL. Springer, New York (2006) Google Scholar
  11. 11.
    Emerson, E.A., Trefler, R.J.: Parametric quantitative temporal reasoning. In: Logic in Computer Science (LICS), pp. 336–343 (1999)Google Scholar
  12. 12.
    Fainekos, G.E., Pappas, G.J.: Robustness of temporal logic specifications for continuous-time signals. Theoret. Comput. Sci. 410(42), 4262–4291 (2009)MathSciNetCrossRefGoogle Scholar
  13. 13.
    Havlicek, J., Little, S.: Realtime regular expressions for analog and mixed-signal assertions. In: Formal Methods in Computer-Aided Design, FMCAD, pp. 155–162 (2011)Google Scholar
  14. 14.
    Henzinger, T.A., Otop, J.: From model checking to model measuring. In: D’Argenio, P.R., Melgratti, H. (eds.) CONCUR 2013 – Concurrency Theory. LNCS, vol. 8052, pp. 273–287. Springer, Heidelberg (2013) CrossRefGoogle Scholar
  15. 15.
    Distributed System Interface. DSI3 Bus Standard. DSI ConsortiumGoogle Scholar
  16. 16.
    Maler, O., Nickovic, D.: Monitoring properties of analog and mixed-signal circuits. STTT 15(3), 247–268 (2013)CrossRefGoogle Scholar
  17. 17.
    Nguyen, T., Ničković, D.: Assertion-based monitoring in practice – checking correctness of an automotive sensor interface. In: Lang, F., Flammini, F. (eds.) FMICS 2014. LNCS, vol. 8718, pp. 16–32. Springer, Heidelberg (2014) Google Scholar
  18. 18.
    Nickovic, D., Maler, O.: AMT: a property-based monitoring tool for analog systems. In: Raskin, J.-F., Thiagarajan, P.S. (eds.) FORMATS 2007. LNCS, pp. 304–319. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  19. 19.
    Ulus, D., Ferrère, T., Asarin, E., Maler, O.: Timed pattern matching. In: Legay, A., Bozga, M. (eds.) FORMATS 2014. LNCS, vol. 8711, pp. 222–236. Springer, Heidelberg (2014) Google Scholar
  20. 20.
    Vijayaraghavan, S., Ramanathan, M.: A Practical Guide for SystemVerilog Assertions. Springer, New York (2006) Google Scholar
  21. 21.
    Wang, F.: Parametric timing analysis for real-time systems. Inf. Comput. 130(2), 131–150 (1996)CrossRefGoogle Scholar

Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Thomas Ferrère
    • 1
  • Oded Maler
    • 1
  • Dejan Ničković
    • 2
  • Dogan Ulus
    • 1
  1. 1.VERIMAGCNRS and the University of Grenoble-AlpesGieresFrance
  2. 2.AIT Austrian Institute of Technology GmbHViennaAustria

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