Advertisement

Application of Functional Decomposition in Synthesis of Reversible Circuits

  • Mariusz Rawski
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9138)

Abstract

The design of reversible circuits differs significantly from the design of conventional circuits. Although many methods to synthesize reversible functions have been developed, most of them are not scalable. In this paper an application of the divide and conquer paradigm is proposed that adopts for reversible logic synthesis the concept of functional decomposition developed for conventional logic synthesis. The initial function is decomposed into a network of smaller sub-functions that are easier to analyze and synthesize into reversible blocks. The final circuit is then composed of these blocks. The results of experiments reported here demonstrate the potential of the proposed approach.

Keywords

Reversible circuits Logic synthesis Functional decomposition 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Fazel, K., Thornton, M., Rice, J.: ESOP-based toffoli gate cascade generation. In: IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 206–209. Citeseer (2007)Google Scholar
  2. 2.
    Große, D., Wille, R., Dueck, G.W., Drechsler, R.: Exact multiple-control toffoli network synthesis with SAT techniques. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28(5), 703–715 (2009)CrossRefGoogle Scholar
  3. 3.
    Gupta, P., Agrawal, A., Jha, N.K.: An algorithm for synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25(11), 2317–2330 (2006)CrossRefGoogle Scholar
  4. 4.
    Kerntopf, P.: A new heuristic algorithm for reversible logic synthesis. In: Proceedings of the 41st Annual Design Automation Conference, pp. 834–837. ACM (2004)Google Scholar
  5. 5.
    Khan, M.H., Perkowski, M.: Multi-output ESOP synthesis with cascades of new reversible gate family. In: Proceedings of the 6th International Symposium on Representations and Methodology of Future Computing Technology, pp. 144–153 (2003)Google Scholar
  6. 6.
    Lewandowski, J., Rawski, M., Rybinski, H.: Application of parallel decomposition for creation of reduced feed-forward neural networks. In: Kryszkiewicz, M., Peters, J.F., Rybiński, H., Skowron, A. (eds.) RSEISP 2007. LNCS (LNAI), vol. 4585, pp. 564–573. Springer, Heidelberg (2007) CrossRefGoogle Scholar
  7. 7.
    Maslov, D., Dueck, G.W., Miller, D.M.: Techniques for the synthesis of reversible toffoli networks. ACM Transactions on Design Automation of Electronic Systems (TODAES) 12(4), 42 (2007)CrossRefGoogle Scholar
  8. 8.
    Miller, D.M., Maslov, D., Dueck, G.W.: A transformation based algorithm for reversible logic synthesis. In: Proceedings of the Design Automation Conference, pp. 318–323. IEEE (2003)Google Scholar
  9. 9.
    Rawski, M., Selvaraj, H., Falkowski, B.J., Łuba, T.: Significance of logic synthesis in FPGA-based design of image and signal processing systems. In: Pattern Recognition Technologies and Applications: Recent Advances, pp. 265–283. IGI Global (2008)Google Scholar
  10. 10.
    Shende, V.V., Prasad, A.K., Markov, I.L., Hayes, J.P.: Synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1(03), 710–722 (2003)CrossRefGoogle Scholar
  11. 11.
    Soeken, M., Frehse, S., Wille, R., Drechsler, R.: RevKit: an open source toolkit for the design of reversible circuits. In: De Vos, A., Wille, R. (eds.) RC 2011. LNCS, vol. 7165, pp. 64–76. Springer, Heidelberg (2012) CrossRefGoogle Scholar
  12. 12.
    Soeken, M., Wille, R., Drechsler, R.: Hierarchical synthesis of reversible circuits using positive and negative davio decomposition. In: 2010 5th International Design and Test Workshop (IDT), pp. 143–148. IEEE (2010)Google Scholar
  13. 13.
    Wille, R., Drechsler, R.: BDD-based synthesis of reversible logic for large functions. In: Proceedings of the 46th Annual Design Automation Conference, pp. 270–275. ACM (2009)Google Scholar

Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Institute of TelecommunicationsWarsaw University of TechnologyWarsawPoland

Personalised recommendations