Cloud-Based Framework for Practical Model-Checking of Industrial Automation Applications

  • Sandeep Patil
  • Dmitrii Drozdov
  • Victor Dubinin
  • Valeriy Vyatkin
Conference paper
Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 450)

Abstract

In this paper we address practical aspects of applying the model-checking method for industrial automation systems verification. Several measures are proposed to cope with the high computational complexity of model-checking. To improve scalability of the method, cloud-based verification tools infrastructure is used. Besides, closed-loop plant controller modelling and synchronization of transitions in the SMV (input language for symbolic model checking) model aim at complexity reduction. The state explosion problem is additionally dealt with by using an abstraction of the model of the plant with net-condition event systems, which is then translated to SMV. In addition, bounded model-checking is applied, which helps to achieve results in cases when the state space is too high. The paper concludes with comparison of performance for different complexity reduction methods.

Keywords

Formal verification Closed-loop modelling Model-checking SMV NCES Industrial automation IEC 61499 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Clarke, E.M., Emerson, E.A.: Design and synthesis of synchronization skeletons using branching-time temporal logic. In: Logic of Programs Workshop (1982)Google Scholar
  2. 2.
    Emerson, E.A., Clarke, E.: Characterizing correctness properties of parallel programs using fixpoints. In: de Bakker, J., van Leeuwen, J. (eds.) Automata, Languages and Programming, vol. 85, pp. 169–181. Springer, Heidelberg (1980)Google Scholar
  3. 3.
    Fix, L.: Fifteen years of formal property verification in intel. In: Grumberg, O., Veith, H. (eds.) 25 Years of Model Checking. LNCS, vol. 5000, pp. 139–144. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  4. 4.
    Kern, C., Greenstreet, M.R.: Formal verification in hardware design: a survey. ACM Trans. Des. Autom. Electron. Syst. 4, 123–193 (1999)CrossRefGoogle Scholar
  5. 5.
    Hanisch, H.-M., Hirsch, M., Missal, D., Preuße, S., Gerber, C.: One decade of IEC 61499 modeling and verification-results and open issues. In: 13th IFAC Symposium on Information Control Problems in Manufacturing. V.A. Trapeznikov Institute of Control Sciences, Russia (2009)Google Scholar
  6. 6.
    Vyatkin, V., Hanisch, H.M.: Formal modeling and verification in the software engineering framework of IEC 61499: a way to self-verifying systems. In: Proceedings of the 8th IEEE International Conference on Emerging Technologies and Factory Automation, vol. 2, pp. 113–118 (2001)Google Scholar
  7. 7.
    Cimatti, A., Clarke, E., Giunchiglia, E., Giunchiglia, F., Pistore, M., Roveri, M., Sebastiani, R., Tacchella, A.: NuSMV 2: an opensource tool for symbolic model checking. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, pp. 359–364. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  8. 8.
    Clarke, E., Grumberg, O., Jha, S., Lu, Y., Veith, H.: Progress on the state explosion problem in model checking. In: Wilhelm, R. (ed.) Informatics: 10 Years Back, 10 Years Ahead. LNCS, vol. 2000, pp. 176–194. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  9. 9.
    Clarke, E., Grumberg, O., Jha, S., Lu, Y., Veith, H.: Counterexample-guided abstraction refinement. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 154–169. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  10. 10.
    Patil, S., Bhadra, S., Vyatkin, V.: Closed-loop formal verification framework with non-determinism, configurable by meta-modelling. In: IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society, pp. 3770–3775 (2011)Google Scholar
  11. 11.
    Patil, S., Dubinin, V., Pang, C., Vyatkin, V.: Neutralizing semantic ambiguities of function block architecture by modeling with ASM. In: 9th International Andrei Ershov Memorial Conference, PSI 2014, Peterhof, St. Petersburg, Russia (2014)Google Scholar
  12. 12.
    Hanisch, H.-M., Lüder, A.: Modular modeling of closed-loop systems. In: Proc of Colloquium on Petri Net Technologies for Modeling Communication Based Systems, Berlin, Germany, pp. 103-126 (2000)Google Scholar
  13. 13.
    Pinzon, L., Jafari, M.A., Hanisch, H.M., Peng, Z.: Modeling admissible behavior using event signals. IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics 34, 1435–1448 (2004)CrossRefGoogle Scholar
  14. 14.
    Patil, S., Vyatkin, V., Sorouri, M.: Formal verification of Intelligent Mechatronic Systems with decentralized control logic. In: 2012 IEEE 17th Conference on Emerging Technologies & Factory Automation (ETFA), pp. 1–7 (2012)Google Scholar
  15. 15.
    Wimmel, G.: A BDD-based Model Checker for the PEP Tool, Major Individual Project Report, Dept. (1997)Google Scholar
  16. 16.
    Cadence SMV Model Checker (March 4). http://www.kenmcmil.com/smv.html
  17. 17.
    Sorouri, M., Patil, S., Vyatkin, V.: Distributed control patterns for intelligent mechatronic systems. In: 2012 10th IEEE International Conference on Industrial Informatics (INDIN), pp. 259–264 (2012)Google Scholar

Copyright information

© IFIP International Federation for Information Processing 2015

Authors and Affiliations

  • Sandeep Patil
    • 1
  • Dmitrii Drozdov
    • 1
    • 2
  • Victor Dubinin
    • 2
  • Valeriy Vyatkin
    • 1
    • 3
  1. 1.Luleå University of TechnologyLuleåSweden
  2. 2.Penza State UniversityPenzaRussia
  3. 3.Aalto UniversityHelsinkiFinland

Personalised recommendations