Hardware Task Scheduling for Partially Reconfigurable FPGAs

  • George Charitopoulos
  • Iosif Koidis
  • Kyprianos Papadimitriou
  • Dionisios PnevmatikatosEmail author
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9040)


Partial reconfiguration (PR) of FPGAs can be used to dynamically extend and adapt the functionality of computing systems, swapping in and out HW tasks. To coordinate the on-demand task execution, we propose and implement a run time system manager for scheduling software (SW) tasks on available processor(s) and hardware (HW) tasks on any number of reconfigurable regions of a partially reconfigurable FPGA. Fed with the initial partitioning of the application into tasks, the corresponding task graph, and the available task mappings, the RTSM considers the runtime status of each task and region, e.g. busy, idle, scheduled for reconfiguration/execution, etc., to execute tasks. Our RTSM supports task reuse and configuration prefetching to minimize reconfigurations, task movement among regions to efficiently manage the FPGA area, and RR reservation for future reconfiguration and execution. We validate its correctness using our RTSM to execute an image processing application on a ZedBoard platform. We also evaluate its features within a simulation framework, and find that despite the technology limitations, our approach can give promising results in terms of quality of scheduling.


Execution Time Task Mapping Task Graph Schedule Decision Runtime System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • George Charitopoulos
    • 1
    • 2
  • Iosif Koidis
    • 1
    • 2
  • Kyprianos Papadimitriou
    • 1
    • 2
  • Dionisios Pnevmatikatos
    • 1
    • 2
    Email author
  1. 1.Institute of Computer ScienceFoundation for Research and Technology – HellasHeraklionGreece
  2. 2.School of Electronic and Computer EngineeringTechnical University of CreteChaniaGreece

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