Reasoning Algebraically About Refinement on TSO Architectures
The Total Store Order memory model is widely implemented by modern multicore architectures such as x86, where local buffers are used for optimisation, allowing limited forms of instruction reordering. The presence of buffers and hardware-controlled buffer flushes increases the level of non-determinism from the level specified by a program, complicating the already difficult task of concurrent programming. This paper presents a new notion of refinement for weak memory models, based on the observation that pending writes to a process’ local variables may be treated as if the effect of the update has already occurred in shared memory. We develop an interval-based model with algebraic rules for various programming constructs. In this framework, several decomposition rules for our new notion of refinement are developed. We apply our approach to verify the spinlock algorithm from the literature.
KeywordsShared Memory Memory Model Critical Section Proof Obligation State Predicate
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- 4.Bovet, D., Cesati, M.: Understanding the Linux Kernel, 3rd edn. OReilly (2005)Google Scholar
- 6.Burckhardt, S., Alur, R., Martin, M.M.K.: Checkfence: Checking consistency of concurrent data types on relaxed memory models. In: PLDI, pp. 12–21 (2007)Google Scholar
- 10.Dongol, B., Derrick, J.: Data refinement for true concurrency. In: Derrick, J., Boiten, E.A., Reeves, S. (eds.) Refine. EPTCS, vol. 115, pp. 15–35 (2013)Google Scholar
- 11.Dongol, B., Derrick, J., Hayes, I.J.: Fractional permissions and non-deterministic evaluators in interval temporal logic. ECEASST 53 (2012)Google Scholar
- 19.Moszkowski, B.C.: A complete axiomatization of Interval Temporal Logic with infinite time. In: LICS, pp. 241–252 (2000)Google Scholar
- 21.Park, S., Dill, D.L.: An executable specification, analyzer and verifier for RMO (relaxed memory order). In: SPAA, pp. 34–41 (1995)Google Scholar
- 23.Sorin, D.J., Hill, M.D., Wood, D.A.: A Primer on Memory Consistency and Cache Coherence. Synthesis Lectures on Computer Architecture. Morgan & Claypool (2011)Google Scholar
- 24.Spivey, J.M.: The Z Notation: A Reference Manual. Prentice Hall (1992)Google Scholar