Unveiling WARIS Code, a Parallel and Multi-purpose FDM Framework
WARIS is an in-house multi-purpose framework focused on solving scientific problems using Finite Difference Methods as numerical scheme. Its framework was designed from scratch to solve in a parallel and efficient way Earth Science and Computational Fluid Dynamic problems on a wide variety of architectures. WARIS uses structured meshes to discretize the problem domains, as these are better suited for optimization in accelerator-based architectures. To succeed in such challenge, WARIS framework was initially designed to be modular in order to ease development cycles, portability, reusability and future extensions of the framework. In order to assess its performance, a code that solves the vectorial Advection-Diffusion-Sedimentation equation has been ported to the WARIS framework. This problem appears in many geophysical applications, including atmospheric transport of passive substances. As an application example, we focus on atmospheric dispersion of volcanic ash, a case in which operational code performance is critical given the threat posed by this substance on aircraft engines. Preliminary results are very promising, performance has been improved by 8.2× with respect to the baseline code using a realistic case. This opens new perspectives for operational setups, including efficient ensemble forecast.
KeywordsFinite Difference Method Ensemble Forecast Stencil Computation Software Architecture Model Computational Fluid Dynamic Problem
Unable to display preview. Download preview PDF.
- 2.D. Callahan, K. Kennedy, A. Porterfield, Software prefetching, in ASPLOS-IV: Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara (ACM, New York, 1991), pp. 40–52Google Scholar
- 5.M. Frigo, V. Strumpen, Cache oblivious stencil computations, in 19th ACM International Conference on Supercomputing, Cambridge, June 2005, pp. 361–366Google Scholar
- 6.S. Kamil, P. Husbands, L. Oliker, J. Shalf, K. Yelick, Impact of modern memory subsystems on cache optimizations for stencil computations, in MSP ’05: Proceedings of the 2005 workshop on Memory System Performance, Chicago (ACM, New York, 2005), pp. 36–43Google Scholar
- 8.X. Ma, M. Winslett, J. Lee, S. Yu, Improving MPI-IO Output Performance with Active Buffering Plus Threads, IPDPS ’03, Nice (IEEE Computer Society, Washington, DC, 2003), pp. 68.2–Google Scholar
- 9.J. McCalpin, D. Wonnacott, Time skewing: a value-based approach to optimizing for memory locality, Technical Report DCS-TR-379, Department of Computer Science, Rutgers University, 1999Google Scholar
- 12.J. Reinders, An Overview of Programming for Intel Xeon processors and Intel Xeon Phi coprocessors, (Intel, 2012)Google Scholar
- 13.G. Rivera, C.W. Tseng, Tiling optimizations for 3D scientific computations, in Proceedings of ACM/IEEE Supercomputing Conference (SC 2000), Dallas (IEEE Computer Society, Washington, DC, Nov 2000), p. 32Google Scholar
- 15.J. Sanders, E. Kandrot, CUDA by Example: An Introduction to General-Purpose gpu Programming (Addison-Wesley Professional, Upper Saddle River, 2010)Google Scholar