Randomised Testing of a Microprocessor Model Using SMT-Solver State Generation

  • Brian Campbell
  • Ian Stark
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8718)

Abstract

We validate a HOL4 model of the ARM Cortex-M0 microcontroller core by testing the model’s behaviour on randomly chosen instructions against a real chip.

The model and our intended application involve precise timing information about instruction execution, but the implementations are pipelined, so checking the behaviour of single instructions would not give us sufficient confidence in the model. Thus we test the model using sequences of randomly chosen instructions.

The main challenge is to meet the constraints on the initial and intermediate execution states: we must ensure that memory accesses are in range and that we respect restrictions on the instructions. By careful transformation of these constraints an off-the-shelf SMT solver can be used to find suitable states for executing test sequences.

Keywords

Randomised testing microprocessor models HOL SMT 

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Brian Campbell
    • 1
  • Ian Stark
    • 1
  1. 1.LFCS, School of InformaticsUniversity of EdinburghUK

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