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Combined AES + AEGIS Architectures for High Performance and Lightweight Security Applications

  • Furkan ŞahinEmail author
  • H. Fatih Uğurdağ
  • Tolga Yalçın
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 311)

Abstract

AES has been the prominent block cipher since its introduction as the standard. It has been the cipher used in almost all new applications that require solid, unbreakable security with reasonable resource usage. Several versions of AES have been implemented in both hardware and software platforms with all kinds of design targets varying from high-performance to lightweight. With the widespread Internet, authenticated encryption (AE) has gained an unprecedented popularity, making AES the logical choice for AE implementations. While there already exists standardized modes that allow AES to be used for AE, more recently, special AE schemes that utilize AES in its native form (or with minimal modifications) have emerged. While these modes claim better performance and resource usage, very few implementations exist to support these claims, yet. In our work, we combine AES with one of the most recent AE ciphers, namely AEGIS, in an effort to analyse the combined performance of the two ciphers.

Keywords

Encryption authenticated encryption AES AEGIS high performance lightweight security FPGA ASIC 

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References

  1. 1.
    Daemennn, J., Rijmen, V.: The Design of Rijndael: AES - The Advanced Encryption Standard. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  2. 2.
    Formal Specification of the CCM Mode of Operation (2005)Google Scholar
  3. 3.
    Information Technology - Security techniques - Authenticated Encryption (2009)Google Scholar
  4. 4.
    Bogdanov, A., Mendel, F., Regazzoni, F., Rijmen, V., Tischhauser, E.: Lightweight aes-based authenticated encryption. In: Fast Software Encryption (FSE), Singapore (March 2013)Google Scholar
  5. 5.
    Wu, H., Preneel, B.: Aegis: A fast authenticated encryption algorithm. Cryptology ePrint Archive, Report 2013/695 (2013), http://eprint.iacr.org/
  6. 6.
    Good, T., Benaissa, M.: Aes on fpga from the fastest to the smallest. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 427–440. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  7. 7.
    Farhan, S.F., Khan, S.A., Jamal, H.: An 8-bit systolic aes architecture for moderate data rate applications. Microprocess. Microsyst. 33(3), 221–231 (2009)CrossRefGoogle Scholar
  8. 8.
    Feldhofer, M., Dominikus, S., Wolkerstorfer, J.: Strong authentication for rfid systems using the aes algorithm. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 357–370. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  9. 9.
    Feldhofer, M., Wolkerstorfer, J., Rijmen, V.: AES implementation on a grain of sand. IEE Proceedings / Information Security 152, 13–20 (2005)Google Scholar
  10. 10.
    Hamalainen, P., Alho, T., Hannikainen, M., Hamalainen, T.D.: Design and implementation of low-area and low-power aes encryption hardware core. In: Proceedings of the 9th EUROMICRO Conference on Digital System Design, DSD 2006, pp. 577–583. IEEE Computer Society, Washington, DC (2006)Google Scholar

Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Furkan Şahin
    • 1
    Email author
  • H. Fatih Uğurdağ
    • 1
  • Tolga Yalçın
    • 2
  1. 1.Department of Electrical and Electronics EngineeringOzyegin UniversityIstanbulTurkey
  2. 2.University of Information Science and Technology “St. Paul the Apostle”OhridMacedonia

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