RSEISP 2014: Rough Sets and Intelligent Systems Paradigms pp 209-216 | Cite as
Generating Core in Rough Set Theory: Design and Implementation on FPGA
Conference paper
Abstract
In this paper we propose the FPGA based device for data processing using rough set methods. Presented architecture has been tested on a real-world data. Obtained results confirm the huge acceleration of the computation time using hardware supporting core generation in comparison to software implementation.
Keywords
Rough sets FPGA hardware corePreview
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