FPGA-Based Parallel DBSCAN Architecture

  • Neil Scicluna
  • Christos-Savvas Bouganis
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8405)


Clustering of a large number of data points is a computational demanding task that often needs the be accelerated in order to be useful in practice. The focus of this work is on the Density-Based Spatial Clustering of Applications with Noise (DBSCAN) algorithm, which is one of the state-of-the-art clustering algorithms, targeting its acceleration using an FPGA device. The paper presents a novel, optimised and scalable architecture that takes advantage of the internal memory structure of modern FPGAs in order to deliver a high performance clustering system. Results show that the developed system can obtain average speed-ups of 32x in real-world tests and 202x in synthetic tests when compared to state-of-the-art software counterparts.


Clustering DBSCAN FPGA Parallel Hardware Architectures 


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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Neil Scicluna
    • 1
  • Christos-Savvas Bouganis
    • 1
  1. 1.EEE DepartmentImperial College LondonLondonUnited Kingdom

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