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Modeling Memristor-Based Circuit Networks on Crossbar Architectures

  • Ioannis Vourkas
  • Georgios C. Sirakoulis

Abstract

Over 30 years ago Leon Chua proposed the existence of a new class of passive circuit elements, which he called memristors and memristive devices. The unique electrical characteristics associated with them, along with the advantages of crossbar structures, have the potential to revolutionize computing architectures. Being associated with the totally nonlinear behavior of individual memristive elements, circuits of multiple memristors may work in very complicated way, quite difficult to predict, due to the polarity-dependent nonlinear variation in the memory resistance (memristance) of individual memristors. A well defined and effective memristor model for circuit design combined with a design paradigm which exploits the composite behavior of memristive elements, based on well understood underlying logic design principles, would certainly accelerate research on nanoscale circuits and systems. Towards this goal, we explore the dynamics of regular network geometries containing only memristive devices and present a memristor crossbar circuit design paradigm in which memristors are modeled using the quantum mechanical phenomenon of tunneling. We use this circuit model to test various logic circuit designs capable of universal computation, and finally, we develop and present a novel design paradigm for memristor-based crossbar circuits.

Keywords

Applied Voltage Resistance Switching Voltage Sweep Hewlett Packard Memristive Device 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Chua, L.O.: Memristor—the missing circuit element. IEEE Trans. Circuit Theory 18, 507–519 (1971) CrossRefGoogle Scholar
  2. 2.
    Williams, R.: How we found the missing memristor. IEEE Spectr. 45(2), 28–35 (2008) CrossRefGoogle Scholar
  3. 3.
    Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: The missing memristor found. Nature 453, 80–83 (2008) CrossRefGoogle Scholar
  4. 4.
    Heath, J.R., Kuekes, P.J., Snider, G.S., Williams, R.S.: A defect-tolerant computer architecture: opportunities for nanotechnology. Science 280, 1716–1721 (1998) CrossRefGoogle Scholar
  5. 5.
    Snider, G.S., Kuekes, P.J., Williams, R.S.: CMOS-like logic in defective, nanoscale crossbars. Nanotechnology 15, 881–891 (2004) CrossRefGoogle Scholar
  6. 6.
    Snider, G.S., Williams, R.S.: Nano/CMOS architectures using a field-programmable nanowire interconnect. Nanotechnology 18, 035204 (2007) CrossRefGoogle Scholar
  7. 7.
    Strukov, D.B., Likharev, K.K.: CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology 16, 888–900 (2005) CrossRefGoogle Scholar
  8. 8.
    Yang, J.J., Borghetti, J., Murphy, D., Stewart, D.R., Williams, R.S.: A family of electronically reconfigurable nanodevices. Adv. Mater. 21, 3754–3758 (2009) CrossRefGoogle Scholar
  9. 9.
    Schiff, L.I.: Quantum Mechanics, 3rd edn. Int. Series in Pure. and Appl. Physics, pp. 100–104. McGraw-Hill, New York (1968) Google Scholar
  10. 10.
    Vourkas, I., Sirakoulis, G.Ch.: A novel design and modeling paradigm for memristor-based crossbar circuits. IEEE Trans. Nanotechnol. 11(6), 1151–1159 (2012) CrossRefGoogle Scholar
  11. 11.
    Easy Java Simulations. http://fem.um.es/Ejs/, Cited 15 June 2013
  12. 12.
    Stan, M.R., Franzon, P.D., Goldstein, S.C., Lach, J.C., Ziegler, M.M.: Molecular electronics: from devices and interconnect to circuits and architecture. Proc. IEEE 91, 1940–1957 (2003) CrossRefGoogle Scholar
  13. 13.
    SIA/Sematech: International Technology Roadmap for Semiconductors (ITRS). http://www.itrs.net, Cited 15 June 2013 (2000)
  14. 14.
    Jo, S.H., Kim, K.-H., Lu, W.: Programmable resistance switching in nanoscale two-terminal devices. Nano Lett. 9(1), 496–500 (2009) CrossRefGoogle Scholar
  15. 15.
    Kim, K.-H., et al.: A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. Nano Lett. 12, 389–395 (2012) CrossRefGoogle Scholar
  16. 16.
    Lu, W., Kim, K.-H., Chang, T., Gaba, S.: Two-terminal resistive switches (Memristors) for memory and logic applications. In: 16th Asia and South Pacific Design Automation Conf. (ASP-DAC 2011), pp. 217–223 (2011) CrossRefGoogle Scholar
  17. 17.
    Rahaman, S.Z., et al.: Excellent resistive switching memory: influence of GeOx in WOx mixture. In: VLSI Technology Int. Symp. Syst. and Applications (VLSI-TSA 2012), pp. 1–2 (2012) Google Scholar
  18. 18.
    Mondal, S., Her, J.-L., Chen, F.-H., Shih, S.-J., Pan, T.-M.: Improved resistance switching characteristics in Ti-doped Yb2O3 for resistive nonvolatile memory devices. IEEE Electron Device Lett. 33(6), 1–3 (2012) CrossRefGoogle Scholar
  19. 19.
    Yu, S., Wu, Y., Jeyasingh, R., Kuzum, D., Philip Wong, H.-S.: An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation. IEEE Trans. Electron Devices 58(8), 2729–2737 (2011) CrossRefGoogle Scholar
  20. 20.
    Kim, H.-D., An, H.-M., Lee, E.B., Kim, T.G.: Stable bipolar resistive switching characteristics and resistive switching mechanisms observed in aluminum nitride-based ReRAM devices. IEEE Trans. Electron Devices 58(10), 3566–3573 (2011) CrossRefGoogle Scholar
  21. 21.
    Wong, H.-S.P., et al.: Metal-oxide RRAM. Proc. IEEE 100(6), 1951–1970 (2012) CrossRefGoogle Scholar
  22. 22.
    Ebong, I.E., Mazumder, P.: Self-controlled writing and erasing in a memristor crossbar memory. IEEE Trans. Nanotechnol. 10(6), 1454–1462 (2011) CrossRefGoogle Scholar
  23. 23.
    Eshraghian, K., et al.: Memristor MOS content addressable memory (MCAM): hybrid architecture for future high performance search engines. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 19(8), 1407–1416 (2011) CrossRefGoogle Scholar
  24. 24.
    Strukov, D.B., Williams, R.S.: Four-dimensional address topology for circuits with stacked multilayer crossbar arrays. Proc. Natl. Acad. Sci. 106(48), 20155–20158 (2009) CrossRefGoogle Scholar
  25. 25.
    Vontobel, P.O., et al.: Writing to and reading from a nano-scale crossbar memory based on memristors. Nanotechnology 20(42), 425204 (2009) CrossRefGoogle Scholar
  26. 26.
    Williams, R.S.: Finding the missing memristor. Keynote talk at UC San Diego CNS Winter 2010 Research Review. http://cns.ucsd.edu/files_2010/january_2010/agenda2010winterreivew.pdf, Cited 15 June 2013
  27. 27.
    Joklekar, Y.N., Wolf, S.J.: The elusive memristor: properties of basic electrical circuits. Eur. J. Phys. 30, 661–675 (2009) CrossRefGoogle Scholar
  28. 28.
    Strukov, D.B., Borghetti, J.L., Williams, R.S.: Coupled ionic and electronic transport model of thin-film semiconductor memristive behavior. Small 5(9), 1058–1063 (2009) CrossRefGoogle Scholar
  29. 29.
    Strukov, D.B., Williams, R.S.: Exponential ionic drift: fast switching and low volatility of thin-film memristors. Appl. Phys. A, Mater. Sci. Process. 94, 515–519 (2009) CrossRefGoogle Scholar
  30. 30.
    Di Ventra, M., Pershin, Yu.V., Chua, L.O.: Circuit elements with memory: memristors, memcapacitors and meminductors. Proc. IEEE 97(10), 1717–1724 (2009) CrossRefGoogle Scholar
  31. 31.
    Chua, L.O., Kang, S.M.: Memristive devices and systems. Proc. IEEE 64, 209–223 (1976) CrossRefMathSciNetGoogle Scholar
  32. 32.
    Pershin, Yu.V., Di Ventra, M.: Practical approach to programmable analog circuits with memristors. IEEE Trans. Circuits Syst. I, Regul. Pap. 57(8), 1857–1864 (2010) CrossRefMathSciNetGoogle Scholar
  33. 33.
    Shin, S., Kim, K., Kang, S.: Memristor applications for programmable analog ICs. IEEE Trans. Nanotechnol. 10(2), 266–274 (2011) CrossRefGoogle Scholar
  34. 34.
    Liu, L., et al.: Engineering oxide resistive switching materials for memristive device application. Appl. Phys. A, Mater. Sci. Process. 102(4), 991–996 (2011) CrossRefGoogle Scholar
  35. 35.
    Xu, N., et al.: Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories. Appl. Phys. Lett. 92, 232112 (2008) CrossRefGoogle Scholar
  36. 36.
    Yakopcic, C., Taha, T.M., Subramanyam, G., Pino, R.E.: Memristor SPICE modeling. In: Advances in Neuromorphic Memristor Science and Applications. Springer Series in Cognitive and Neural Systems vol. 4, pp. 211–244 (2012) CrossRefGoogle Scholar
  37. 37.
    Ziegler, M.M., Stan, M.R.: CMOS/nano co-design for crossbar-based molecular electronic systems. IEEE Trans. Nanotechnol. 2, 217–230 (2003) CrossRefGoogle Scholar
  38. 38.
    Yan, H., et al.: Programmable nanowire circuits for nanoprocessors. Nat. Lett. 470, 240–244 (2011) CrossRefGoogle Scholar
  39. 39.
    Xia, Q.F., et al.: Memristor-CMOS hybrid integrated circuits for reconfigurable logic. Nano Lett. 9, 3640–3645 (2009) CrossRefGoogle Scholar
  40. 40.
    Borghetti, J., et al.: A hybrid nanomemristor/transistor logic circuit capable of self-programming. Proc. Natl. Acad. Sci. 106(6), 1699–1703 (2009) CrossRefGoogle Scholar
  41. 41.
    Pickett, M.D., et al.: Switching dynamics in titanium dioxide memristive devices. J. Appl. Phys. 106, 074508 (2009) CrossRefGoogle Scholar
  42. 42.
    Linn, E., Rosezin, R., Kugeler, C., Waser, R.: Complementary resistive switches for passive nancrossbar memories. Nat. Mater. 9(5), 403–406 (2010) CrossRefGoogle Scholar
  43. 43.
    Liu, T., Kang, Y., Verma, M., Orlowski, M.K.: Witching characteristics of antiparallel resistive switches. IEEE Trans. Electron Device Lett. 33(3), 429–431 (2012) CrossRefGoogle Scholar
  44. 44.
    Kavehei, O., Al-Sarawi, S., Cho, K.-R., Eshraghian, K., Abbott, D.: An analytical approach for memristive nanoarchitectures. IEEE Trans. Nanotechnol. 11(2) (2012) Google Scholar
  45. 45.
    Dong, M., Zhong, L.: Nanowire crossbar logic and standard cell-based integration. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 17(8), 997–1007 (2009) CrossRefGoogle Scholar
  46. 46.
    Ho, Y., Huang, G.M., Li, P.: Dynamical properties and design analysis for nonvolatile memristor memories. IEEE Trans. Circuits Syst. I, Regul. Pap. 58(4), 724–736 (2011) CrossRefMathSciNetGoogle Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  1. 1.Democritus University of ThraceXanthiGreece

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