Addressing Reliability in Physical Design

  • Jens LienigEmail author
  • Juergen Scheible


Reliability of electronic circuits is becoming an increasing concern due to the ongoing downscaling of the structural dimensions and the continuous increase in performance requirements. This final chapter addresses the many options available to a layout designer, given the enormous influence of physical design on circuit reliability. Hence, the goal of this chapter is to summarize the state of the art in reliability-driven physical design and related mitigating measures. We start by presenting reliability issues that can lead to temporary circuit malfunctions. We discuss in this context parasitic effects in the bulk of silicon (Sect. 7.1), at its surface (Sect. 7.2), and in the interconnect layers (Sect. 7.3). Our main goal is to show how these effects can be suppressed through appropriate layout measures. After having presented temporarily-induced malfunctions and their mitigation options, we discuss the growing challenges of preventing ICs from irreversible damage. This requires the investigation of overvoltage events (Sect. 7.4) and migration processes, such as electromigration, thermal and stress migration (Sect. 7.5). Again, not only do we discuss the physical background to this damage, we also present appropriate mitigation measures.


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© Springer Nature Switzerland AG 2020

Authors and Affiliations

  1. 1.Electrical and Computer EngineeringDresden University of TechnologyDresden, SaxonyGermany
  2. 2.Electronic Design AutomationReutlingen UniversityReutlingen, Baden-WuerttembergGermany

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