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FPGA-Based Implementations of Fractional-Order Chaotic Systems

  • Esteban Tlelo-Cuautle
  • Ana Dalia Pano-Azucena
  • Omar Guillén-Fernández
  • Alejandro Silva-Juárez
Chapter

Abstract

From time simulation applying Grünwald-Letnikov, Adams-Bashforth-Moulton, or other approximation methods, one can describe the iterative equations in a way that the fractional-order chaotic oscillator can be implemented in digital hardware. This chapter describes the implementation using FPGAs. Special attention is devoted to show VHDL descriptions of the different logic blocks, memory modules, and finite-state machine. Some aspects to reduce digital hardware resources, particularly on FPGAs, are discussed, as well as combinatorial and sequential implementation issues.

Keywords

VHDL description Entity Architecture Computer arithmetic Grünwald-Letnikov Adams-Bashforth-Moulton RAM ROM Short-memory principle Cumulative sum FPGA 

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Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  • Esteban Tlelo-Cuautle
    • 1
  • Ana Dalia Pano-Azucena
    • 1
  • Omar Guillén-Fernández
    • 1
  • Alejandro Silva-Juárez
    • 1
  1. 1.INAOETonantzintlaMexico

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