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RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM

  • Deepak M. MathewEmail author
  • André Lucas Chinazzo
  • Christian Weis
  • Matthias Jung
  • Bastien Giraud
  • Pascal Vivet
  • Alexandre Levisse
  • Norbert Wehn
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11733)

Abstract

Resistive RAM (RRAM) is a promising emerging Non-Volatile Memory candidate due to its scalability and CMOS compatibility, which enables the fabrication of high density RRAM crossbar arrays in Back-End-Of-Line CMOS processes. Fast and accurate architectural models of RRAM crossbar devices are required to perform system level design space explorations of new Storage Class Memory (SCM) architectures using RRAM e.g. Non-Volatile-DIMM-P (NVDIMM-P). The major challenge in architectural modeling is the trade-off between accuracy and computing intensity. In this paper we present RRAMSpec, an architecture design space exploration framework, which enables fast exploration of various architectural trade-offs in designing high density RRAM devices, at accuracy levels close to circuit level simulators. The framework estimates silicon area, timings, and energy for RRAM devices. It outperforms state-of-the-art RRAM modeling tools by conducting architectural explorations at very high accuracy levels within few seconds of execution time. Our evaluations show various trade-offs in designing RRAM crossbar arrays with respect to array sizes, write time and write energy. Finally we present the influence of technology scaling on different RRAM design trade-offs.

Keywords

RRAM ReRAM Crossbar NVM 

Notes

Acknowledgment

This work was funded by the Carl-Zeiss Stiftung under the Nachwuchsförderprogram 2015 and the EU OPRECOMP project (http://oprecomp.eu) under grant agreement No. 732631. This work was also supported by the the Fraunhofer High Performance Center for Simulation- and Software-based Innovation and ERC Consolidator Grant COMPUSAPIEN (Grant No. 725657). The authors thank the Electronic Materials Research Lab (EMRL) at the RWTH Aachen for their great support.

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Deepak M. Mathew
    • 1
    Email author
  • André Lucas Chinazzo
    • 1
  • Christian Weis
    • 1
  • Matthias Jung
    • 2
  • Bastien Giraud
    • 3
  • Pascal Vivet
    • 3
  • Alexandre Levisse
    • 4
  • Norbert Wehn
    • 1
  1. 1.Technische Universität KaiserslauternKaiserslauternGermany
  2. 2.Fraunhofer Institute for Experimental Software Engineering (IESE)KaiserslauternGermany
  3. 3.Univ. Grenoble Alpes, CEA-LETI, MINATEC CampusGrenobleFrance
  4. 4.Embedded System Laboratory (ESL), EPFLLausanneSwitzerland

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