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Abstract

Does innovation in ADC design follow a straight-line progression? Should the pervasive use of figures of merit (FOMs) be encouraged? It is the author contention that a closer look to the symbiosis between converters applications and converters technology suggests a substantially more complex picture deserving attention. Two emerging ADC classes, the time-domain converters and compressive sampling techniques, are examples of a different view on this topic.

Keywords

Analog–digital conversion Compressive sensing Time-digital conversion Technological innovation Wireless sensor networks 

References

  1. 1.
    G. Manganaro, Advanced Data Converters (Cambridge University Press, Cambridge, 2011)CrossRefGoogle Scholar
  2. 2.
    D. Robertson, A. Buchwald, M. Flynn, H.-S. Lee, U.-K. Moon, B. Murmann, Data converter reflections: 19 papers from the last ten years that deserve a second look, in 2016 European Solid-State Circuits Conference (ESSCIRC) (2016), pp. 161–164Google Scholar
  3. 3.
    B. Murmann, The race for the extra decibel. IEEE Solid-State Circuits Mag. Summer, 58–66 (2015)Google Scholar
  4. 4.
    B.E. Jonsson, A survey of A/D-converter performance evolution, in IEEE Int. Conf. Electronics, Circuits and Systems (2010), pp. 766–769Google Scholar
  5. 5.
    R.H. Walden, Analog-to-digital converter survey and analysis. IEEE J. Sel. Areas Commun. 17(4), 539–550 (1999)CrossRefGoogle Scholar
  6. 6.
    G. Manganaro, Emerging data converter architectures and techniques, in 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego (CA), USA (2018)Google Scholar
  7. 7.
    G. Manganaro, F. Tavernier, B. Dobkin, A. de Graauw, J. Stauth, L. Loh, P. Andreani, Figures-of-merit on trial, in 2018 IEEE Int. Solid-State Circuits Conference, Evening Session (2018)Google Scholar
  8. 8.
    B. Murmann, ADC performance survey 1997–2017 [Online]. Available http://web.stanford.edu/~murmann/adcsurvey.html
  9. 9.
    G. Manganaro, D. Leenaerts, Advances in Analog and RF IC Design for Wireless Communication Systems (Academic Press, Orlando, 2013)Google Scholar
  10. 10.
    J. Thompson, Z. Ge, Z.-C. Wu, R. Irmer, H. Jiang, G. Fettweis, S. Alamouti (Eds.), Special issue on “5G wireless communication systems: prospects and challenges, in IEEE Communications Magazine (2014)Google Scholar
  11. 11.
    S. Devarajan, L. Singer, D. Kelly, T. Pan, J. Silva, J. Brunsilius, D. Rey-Losada, F. Murden, C. Speir, J. Bray, E. Otte, N. Rakuljic, P. Brown, T. Weidgandt, Q. Yu, D. Paterson, C. Petersen, J. Gealow, G. Manganaro, A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology, in IEEE J. Solid-State Circuits (2017)Google Scholar
  12. 12.
    K. Bult, in The effect of technology scaling on power dissipation in analog circuits, ed. By M. Steyaert, A.H. van Roermund, J.H. Huijsing. Analog Circuits Design (Springer, Berlin, 2006), pp. 251–290Google Scholar
  13. 13.
    N. Rakuljic, C. Speir, E. Otte, J. Bray, C. Petersen, G. Manganaro, In-situ nonlinear calibration of a RF signal chain, in 2018 IEEE Int. Symp. on Circuits and Systems (ISCAS), Florence, Italy (2018)Google Scholar
  14. 14.
    C. Toumazou, F.J. Lidgey, D.G. Haigh (Eds.), Analog IC Design: the current-mode approach, in IEE Circuits, Devices and Systems Series (1990)Google Scholar
  15. 15.
    G.W. Roberts, M. Ali-Bakhshian, A brief introduction to time-to-digital and digital-to-time converters. IEEE Trans. Circuits Syst. 57(3), 153–157 (2010)CrossRefGoogle Scholar
  16. 16.
    P.K. Hanumolu, Time-based ΔΣ ADCs, in CICC (2017)Google Scholar
  17. 17.
    X. Tang, W.T. Ng, K.-P. Pun, A resistor-based sub-1-V CMOS smart temperature sensor for VLSI thermal management. IEEE Trans. VLSI 23(9), 1850091 (2015)Google Scholar
  18. 18.
    S. Jeong et al., A fully-integrated 71 nW CMOS temperature sensor for low power wireless sensor nodes. IEEE J. Solid State Circuits 49(8), 1682–1693 (2014)CrossRefGoogle Scholar
  19. 19.
    N. Sayiner, H. Sorensen, T. Viswanathan, A level-crossing sampling scheme for A/D conversion. IEEE Trans. Circuits Syst. 43(4), 335–339 (1996)CrossRefGoogle Scholar
  20. 20.
    W. Holt, Moore’s law: a path going forward, in ISSCC (2016), pp. 8–13Google Scholar
  21. 21.
    A. Hajimiri, S. Limotyrakis, T.H. Lee, Jitter and phase noise in ring oscillators. IEEE J. Solid State Circuits 34(6), 790–804 (1999)CrossRefGoogle Scholar
  22. 22.
    D. Ponton et al., Assessment of the impact of technology scaling on the performance of LC-VCOs. in ESSCIRC (2009), pp. 364–367Google Scholar
  23. 23.
    S.-Y. Wu et al., A 16nm FinFET CMOS technology for mobile SoC and computing applications, in IEDM (2013)Google Scholar
  24. 24.
    S.-Y. Wu et al., An enhanced 16nm CMOS technology featuring 2nd generation FinFET transistors and advanced Cu/low-k interconnect for low power and high performance applications, in IEDM (2014)Google Scholar
  25. 25.
    Y. Tsividis, Event-driven data acquisition and digital signal processing - a tutorial. IEEE Trans. Circuits Syst. 57(8), 577–581 (2010)MathSciNetCrossRefGoogle Scholar
  26. 26.
    E.J. Candès, J. Romberg, T. Tao, Robust uncertainty principles: exact signal reconstruction from highly incomplete frequency information. IEEE Trans. Inf. Theory 52(2), 489–509 (2006)MathSciNetCrossRefGoogle Scholar
  27. 27.
    D.L. Donoho, Compressed sensing. IEEE Trans. Inf. Theory 52(4), 1289–1306 (2006)MathSciNetCrossRefGoogle Scholar
  28. 28.
    M. Mangia, R. Rovatti, G. Setti, Rakeness in the design of analog-to-information conversion of sparse and localized signals. IEEE Trans. Circuits Syst. 59(5), 1001–1014 (2012)MathSciNetCrossRefGoogle Scholar
  29. 29.
    F. Chen, A.P. Chandrakasan, V.M. Stojanovic, Design and analysis of a hardware-efficient compressed sensing architecture for data compression in wireless sensors. IEEE J. Solid State Circuits 47(3), 744–756 (2012)CrossRefGoogle Scholar
  30. 30.
    X. Chen, Z. Yu, S. Hoyos, B.M. Sadler, J. Silva-Martinez, A sub-Nyquist rate sampling receiver exploiting compressive sensing. IEEE Trans. Circuits Syst. 58(3), 507–520 (2011)MathSciNetCrossRefGoogle Scholar
  31. 31.
    D. Gangopadhyay, E.G. Allstot, A.M.R. Dixon, K. Natarajan, S. Gupta, D.J. Allstot, Compressed sensing analog front-end for bio-sensor applications. IEEE J. Solid State Circuits 49(2), 426–438 (2014)CrossRefGoogle Scholar
  32. 32.
    M. Trakimas, R. D’Angelo, S. Aeron, T. Hancock, S. Sonkusale, A compressed sensing analog-to-information converter with edge-triggered SAR ADC Core. IEEE Trans. Circuits Syst. 60(5), 1135–1148 (2013)MathSciNetCrossRefGoogle Scholar
  33. 33.
    V.R. Pamula et al., A 172 μW compressively sampled photoplethysmographic (PPG) readout ASIC with heart rate estimation directly from compressively sampled data. IEEE Trans. Biomed. Circuits Syst. 11(3), 487–496 (2017)CrossRefGoogle Scholar
  34. 34.
    W. Guo, Y. Kim, A.H. Tewfik, N. Sun, A fully passive compressive sensing SAR ADC for low-power wireless sensors. IEEE J. Solid State Circuits 52(8), 2154–2167 (2017)CrossRefGoogle Scholar
  35. 35.
    T.-F. Wu, S. Dey, M.S.-W. Chen, A nonuniform sampling ADC architecture with reconfigurable digital anti-aliasing filter. IEEE Trans. Circuits Syst. 63(10), 1639–1651 (2016)MathSciNetCrossRefGoogle Scholar
  36. 36.
    T.-F. Wu, C.-R. Ho, M.S.-W. Chen, A flash-based non-uniform sampling ADC with hybrid quantization enabling digital anti-aliasing filter. IEEE J. Solid State Circuits 52(9), 2335–2349 (2017)CrossRefGoogle Scholar
  37. 37.
    S.-J. Huang, et al., A 125MHz-BW 71.9dB-SNDR VCO-Based CT ΔΣ ADC with segmented phase-domain ELD compensation in 16nm CMOS, in ISSCC (2017), pp. 470–471Google Scholar
  38. 38.
    C.-H. Weng, C.-K. Wu, T.-H. Lin, A CMOS thermistor-embedded continuous-time delta-sigma temperature sensor with a resolution FoM of 0.65pJoC2. IEEE J. Solid State Circuits 50(11), 2491–2500 (2015)CrossRefGoogle Scholar
  39. 39.
    P.K. Yenduri et al., A low-power compressive sampling time-based analog-to-digital converter. IEEE J. Emerg. Top. Circuits Syst. 2, 502–515 (2012)CrossRefGoogle Scholar
  40. 40.
    H. Mamaghanian, N. Khaled, D. Atienza, P. Vandergheynst, Design and exploration of low-power analog to information conversion based on compressed sensing. IEEE J. Emerg. Top. Circuits Syst. 2, 493–501 (2012)CrossRefGoogle Scholar

Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  1. 1.Analog Devices, Inc.WilmingtonUSA

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