This chapter deals with the synthesis of SOC, detailing the strategies adopted for synthesis of different constituents of SOC. It also deals with standard cell library selection, SOC design constraints, Synthesis optimization, Synthesis report generation, intrepretation of the reports and some useful guidelines to get desired SOC design performance.
Technology library Standard cell Macros Memories Constraints SDC LINT Synthesis Netlist Lib file SDF format
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Synthesis and optimization of digital circuits by Giovanni De Micheli, Tata McGraw-hill editionGoogle Scholar