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Logarithmic VTC Design

  • Mauro SantosEmail author
  • Jorge Guilherme
  • Nuno Horta
Chapter
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 558)

Abstract

This Chapter will present the design of two logarithmic voltage-to-time conversion elements. Both options analyzed in the previous chapter, conversion elements with and without degeneration resistors, will be designed. The design will be performed using the equations derived in the previous chapter. Simulation results for process corners, offset and Monte Carlo will be presented at the end of the chapter.

Reference

  1. 1.
    A. Abidi, H. Xu, Understanding the regenerative comparator circuit, in Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, San Jose, CA (2014), pp. 1–8Google Scholar

Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Synopsys Portugal LdaPorto SalvoPortugal
  2. 2.Instituto Superior TécnicoInstituto TelecomunicaçõesLisbonPortugal
  3. 3.Instituto Superior TécnicoInstituto TelecomunicaçõesLisbonPortugal

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