Optimization of the Hardware Costs of Interpolation Converters for Calculations in the Logarithmic Number System

  • Ilya OsininEmail author
Conference paper
Part of the Studies in Systems, Decision and Control book series (SSDC, volume 199)


The logarithmic number system (LNS) is an advanced alternative to the widely known in a computer technology representation of floating-point numbers. It provides greater accuracy and speed of computation with a comparable range of representation of numbers. However, the widespread use of LNS is prevented by the need to apply interpolation to convert numbers from the traditional format and back, and to perform addition/subtraction operations. Known solutions are oriented to interpolation by a first-order polynomial, which does not allow the use of double or quadruple precision due to exponential growth of hardware costs. The work is devoted to minimizing hardware costs by optimizing the order of the interpolation polynomial and the interpolation step for computations over numbers of different width. The results of the work can be used to develop arithmetic devices that operate with numbers in the LNS and are optimized for the level of hardware costs.


Logarithmic number system LNS Interpolation Accuracy Polynomial 


  1. 1.
    Swartzlander, E., Alexopoulus, A.: The sign/logarithm number system. IEEE Trans. Comput. 100, 1238–1242 (1975). Scholar
  2. 2.
    Taylor, F.: An extended precision logarithmic number system. IEEE Trans. Acoust. Speech Signal Process. 31, 232–234 (1983). Scholar
  3. 3.
    Coleman, J.N., Softley, C.I., Kadlec, J.: The european logarithmic microprocesor. IEEE Trans. Comput. 57, 532–546 (2008). Scholar
  4. 4.
    Naziri, S., Ismail, R., Shakaff, A.: The design revolution of logarithmic number system architecture. In: 2014 2nd International Conference on Electrical, Electronics and System Engineering (ICEESE), pp. 5–10 (2014).
  5. 5.
    Coleman, J.N., Ismail, R.: LNS with co-transformation competes with floating-point. IEEE Trans. Comput. 65, 136–146 (2016). Scholar
  6. 6.
    Ismail, R., Coleman, J.N.: ROM-less LNS. In: 2011 IEEE 20th Symposium on Computer Arithmetic, pp. 43–51 (2011).
  7. 7.
    Ismail, R., Hussin, R., Murad, S.A.: Interpolator algorithms for approximating the LNS addition and subtraction: design and analysis. In: IEEE Transactions on Computers, pp. 174–179 (2012).
  8. 8.
    Tsiaras, G., Paliouras, V.: Logarithmic number system addition-subtraction using fractional normalization. In: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1325–1336 (2017).
  9. 9.
    Ellaithy, D.M., El-Moursy, M.A., Ibrahim, G.H., Zaki, A., Zekry, A.: Double logarithmic arithmetic technique for GPU. In: 2017 12th International Conference on Computer Engineering and Systems (ICCES), pp. 974–982 (2018).
  10. 10.
    Osinin, I.P.: A modular-logarithmic coprocessor concept. In: Proceedings International Conference on High Performance Computing & Simulation (HPCS-2017), pp. 588–595 (2017).

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© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Scientific Production Association Real-Time Software ComplexesMoscowRussia

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