Advertisement

Main Parasitic Effects in Contactless Wafer Testing

  • Alessandro FinocchiaroEmail author
  • Giovanni Girlando
  • Alessandro Motta
  • Alberto Pagani
  • Giuseppe Palmisano
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 573)

Abstract

The paper presents an analysis of principal parasitic effects in contactless wafer-level testing. Contactless technology exploits an inductive coupling between a tester antenna and many integrated on-chip antennas (OCAs) able to transfer energy and exchange bidirectional data. Electromagnetic crosstalk between adjacent on-chip antennas and the eddy currents generated in the substrate were analyzed. Simulations, varying the thickness and the conductivity of the substrate, have highlighted the strengths of this approach. Moreover, a wafer scribe line pre-cutting, used to drastically reducing the eddy currents, was also adopted.

Keywords

On-chip antenna Contactless testing Magnetic coupling Eddy currents 

References

  1. 1.
    Finocchiaro, A., et al.: A 900-MHz RFID system with TAG-antenna magnetically-coupled to the die. In: IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, pp. 281–284 (2008)Google Scholar
  2. 2.
    Finocchiaro, A., et al.: A fully contactless wafer-level testing for UHF RFID tag with on-chip antenna. In: 13th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Taormina, Italy, pp. 1–6 (2018)Google Scholar
  3. 3.
    Moore, B., et al.: High throughput non-contact SiP testing. In: IEEE International Test Conference, Santa Clara, CA, pp. 1–10 (2007)Google Scholar
  4. 4.
    Hsu, H.-M., Chang, J.-Z.: Mutual coupling of on-chip inductors in CMOS technology. J. Micromech. Microeng. 18(3) (2008)CrossRefGoogle Scholar
  5. 5.
    Zhang, F., Kinget, P.R.: Design of components and circuits underneath integrated inductors. IEEE J. Solid-State Circuits 41(10), 2265–2271 (2006)CrossRefGoogle Scholar
  6. 6.
    Pagani, A., Girlando, G., Ziglioli, F.G., Finocchiaro, A.: IC with insulating trench and related methods. US Patent 9 887 165 (2018)Google Scholar
  7. 7.

Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Alessandro Finocchiaro
    • 1
    Email author
  • Giovanni Girlando
    • 1
  • Alessandro Motta
    • 2
  • Alberto Pagani
    • 2
  • Giuseppe Palmisano
    • 3
  1. 1.STMicroelectronicsCataniaItaly
  2. 2.STMicroelectronicsAgrate BrianzaItaly
  3. 3.DIEEIUniversity of CataniaCataniaItaly

Personalised recommendations