Efficient Implementation of Recurrent Neural Network Accelerators

  • Vida AbdolzadehEmail author
  • Nicola Petra
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 573)


In this paper we propose an accelerator for the implementation of Long Short-Term Memory layer in Recurrent Neural Networks. We analyze the effect of quantization on the accuracy of the network and we derive an architecture that improves the throughput and latency of the accelerator. The proposed technique only requires one training process, hence reducing the design time. We present implementation results of the proposed accelerator. The performance compares favorably with other solutions presented in Literature.


  1. 1.
    Han et al.: ESE: efficient speech recognition engine with sparse LSTM on FPGA. In: Proceedings of the 2017 ACM/SIGDA FPGA 2017, Monterey, CA, USA, Feb. 2017, pp. 75–84Google Scholar
  2. 2.
    Wang, W., Xie, Y., Ren, L., Zhu, X., Chang, R., Yin, Q.: Detection of data injection attack in industrial control system using long short term memory recurrent neural network. In: 13th IEEE ICIEA, Wuhan, China, pp. 2710–2715 (2018).
  3. 3.
    Zou, L., Gu, Y., Song, J., Liu, W., Yao, Y.: Long short-term memory based recurrent neural networks for collaborative filtering. In: IEEE UIC 2017 San Francisco, CA, USA, pp. 1–6.
  4. 4.
    Ardakani et al.: An Architecture to accelerate convolution in deep neural networks. IEEE TCAS I: Regular Papers 65(4) (2018)CrossRefGoogle Scholar
  5. 5.
    Price et al.: A low-power speech recognizer and voice activity detector using deep neural networks. IEEE JSSC 53(1) (2018)CrossRefGoogle Scholar
  6. 6.
    Moini et al.: A resource-limited hardware accelerator for convolutional neural networks in embedded vision applications. IEEE TCAS II: Express Briefs 64(10) (2017)CrossRefGoogle Scholar
  7. 7.
    JANUARY 2018, pp. 198–208.UCI Machine Learning Repository: Japanese Vowels Dataset.
  8. 8.
    Chang et al.: Recurrent Neural Networks Hardware Implementation on FPGA (2015).
  9. 9.
    Du et al.: A Reconfigurable streaming deep convolutional neural network accelerator for internet of things. IEEE TCASI 65(1) (2018)CrossRefGoogle Scholar
  10. 10.
    Hyn-d-man, R.J.: Time Series DataLibrary.

Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Department of Electrical Engineering and Information TechnologyUniversity Federico IINaplesItaly

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