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Automatic Integration of HDL IPs in Simulink Using FMI and S-Function Interfaces

  • Stefano CentomoEmail author
  • Michele Lora
  • Antonio Portaluri
  • Francesco Stefanni
  • Franco Fummi
Chapter
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 530)

Abstract

Verification of cyber-physical systems SW often requires simulation of accurate heterogeneous HW models. However, heterogeneous system simulators do not easily allow it and designers must connect multiple simulators in complex co-simulation environments. Furthermore, usually HW computing platforms are “approximated” by using abstracted models that do not accurately reproduce the cycle-based execution of HW components. In this chapter we present the automatic generation of cycle-accurate Simulink blocks from the most popular HW description languages: VHDL and Verilog.

The methodology starts from an IP core modeled in one of the two supported HW description languages. Then, it relies on state-of-the-art RTL models abstraction method to generate a functionally equivalent cycle-accurate model of the IP. Then, it uses two alternative mapping and code-generation techniques. The first relying on the portable FMI standard, while the other one exploits Mathworks’ proprietary C MEX S-Functions. These blocks can be easily integrated within Simulink to simulate digital HW components while avoiding to build complex co-simulation environments. A set of IP cores are used to evaluate the proposed approach. Furthermore, the experiments presented in this chapter compares the two proposed mapping and code-generation alternatives to highlight their advantages and drawbacks.

Keywords

Hardware description languages Co-simulation Mathworks simulink Functional mockup interface Cyber-physical systems simulation Virtual platforms Automatic code generation 

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Stefano Centomo
    • 1
    Email author
  • Michele Lora
    • 1
  • Antonio Portaluri
    • 2
  • Francesco Stefanni
    • 2
  • Franco Fummi
    • 1
  1. 1.Department of Computer ScienceUniversity of VeronaVeronaItaly
  2. 2.EdaLab s.r.l. VeronaVeronaItaly

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