Advertisement

Energy-Aware Algorithms for Task Graph Scheduling, Replica Placement and Checkpoint Strategies

  • Guillaume AupyEmail author
  • Anne Benoit
  • Paul Renaud-Goud
  • Yves Robert

Abstract

The energy consumption of computational platforms has recently become a critical problem, both for economic and environmental reasons. To reduce energy consumption, processors can run at different speeds. Faster speeds allow for a faster execution, but they also lead to a much higher (superlinear) power consumption. Energy-aware scheduling aims at minimizing the energy consumed during the execution of the target application, both for computations and for communications. The price to pay for a lower energy consumption usually is a much larger execution time, so the energy-aware approach makes better sense when coupled with some prescribed performance bound. In other words, we have a bi-criteria optimization problem, with one objective being energy minimization, and the other being performance-related.

Keywords

Power Consumption Execution Time Task Graph Incremental Model Dynamic Voltage Scaling 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Notes

Acknowledgments

This work was supported in part by the ANR RESCUE project.

References

  1. 1.
    AMD processors. http://www.amd.com.
  2. 2.
    G. Aupy, A. Benoit, F. Dufossé, and Y. Robert. Reclaiming the energy of a schedule: models and algorithms. Concurrency and Computation: Practice and Experience, 2012.Google Scholar
  3. 3.
    G. Aupy, A. Benoit, R. Melhem, P. Renaud-Goud, and Y. Robert. Energy-aware checkpointing of divisible tasks with soft or hard deadlines. In Proceedings of the International Green Computing Conference (IGCC), Arlington, USA, June 2013.Google Scholar
  4. 4.
    H. Aydin and Q. Yang. Energy-aware partitioning for multiprocessor real-time systems. In Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS), pages 113–121. IEEE CS Press, 2003.Google Scholar
  5. 5.
    N. Bansal, T. Kimbrel, and K. Pruhs. Speed scaling to manage energy and temperature. Journal of the ACM, 54(1):1–39, 2007.CrossRefzbMATHMathSciNetGoogle Scholar
  6. 6.
    E. Beigne, F. Clermidy, J. Durupt, H. Lhermet, S. Miermont, Y. Thonnart, T. Xuan, A. Valentian, D. Varreau, and P. Vivet. An asynchronous power aware and adaptive NoC based circuit. In Proceedings of the 2008 IEEE Symposium on VLSI Circuits, pages 190–191, June 2008.Google Scholar
  7. 7.
    E. Beigne, F. Clermidy, S. Miermont, Y. Thonnart, A.Valentian, and P.Vivet.ALocalized Power Control mixing hopping and Super Cut-Off techniques within a GALS NoC. In Proceedings of the IEEE International Conference on Integrated Circuit Design and Technology and Tutorial (ICICDT), pages 37–42, June 2008.Google Scholar
  8. 8.
    A. Benoit, V. Rehn-Sonigo, and Y. Robert. Replica placement and access policies in tree networks. IEEE Trans. Parallel and Distributed Systems, 19(12):1614–1627, 2008.CrossRefGoogle Scholar
  9. 9.
    A. Benoit, P. Renaud-Goud, and Y. Robert. Power-aware replica placement and update strategies in tree networks. In Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS), Anchorage, USA, May 2011.Google Scholar
  10. 10.
    S. Boyd and L. Vandenberghe. Convex Optimization. Cambridge University Press, 2004.Google Scholar
  11. 11.
    G. Buttazzo, G. Lipari, L. Abeni, and M. Caccamo. Soft Real-Time Systems: Predictability vs. Efficiency. Springer series in Computer Science, 2005.Google Scholar
  12. 12.
    A. P. Chandrakasan andA. Sinha. JouleTrack:AWeb BasedTool for Software Energy Profiling. In Design Automation Conference, pages 220–225, Los Alamitos, CA, USA, 2001. IEEE Computer Society Press.Google Scholar
  13. 13.
    G. Chen, K. Malkowski, M. Kandemir, and P. Raghavan. Reducing power with performance constraints for parallel sparse applications. In Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS), page 8 pp., Apr. 2005.Google Scholar
  14. 14.
    J.-J. Chen and C.-F. Kuo. Energy-Efficient Scheduling for Real-Time Systems on Dynamic Voltage Scaling (DVS) Platforms. In Proceedings of the InternationalWorkshop on Real-Time Computing Systems and Applications, pages 28–38, Los Alamitos, CA, USA, 2007. IEEE Computer Society.Google Scholar
  15. 15.
    J.-J. Chen and T.-W. Kuo. Multiprocessor energy-efficient scheduling for real-time tasks. In Proceedings of International Conference on Parallel Processing (ICPP), pages 13–20. IEEE CS Press, 2005.Google Scholar
  16. 16.
    I. Cidon, S. Kutten, and R. Soffer. Optimal allocation of electronic content. Computer Networks, 40:205–218, 2002.CrossRefGoogle Scholar
  17. 17.
    V. Degalahal, L. Li, V. Narayanan, M. Kandemir, and M. J. Irwin. Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst., 13:1157–1166, October 2005.CrossRefGoogle Scholar
  18. 18.
    J. Dongarra, P. Beckman, P. Aerts, F. Cappello, T. Lippert, S. Matsuoka, P. Messina, T. Moore, R. Stevens, A. Trefethen, and M. Valero. The international exascale software project: a call to cooperative action by the global high-performance community. Int. J. High Perform. Comput. Appl., 23(4):309–322, 2009.CrossRefGoogle Scholar
  19. 19.
    M. R. Garey and D. S. Johnson. Computers and Intractability; A Guide to the Theory of NP-Completeness. W. H. Freeman & Co., NewYork, NY, USA, 1990.Google Scholar
  20. 20.
    R. Ge, X. Feng, and K. W. Cameron. Performance-constrained distributed DVS scheduling for scientific applications on power-aware clusters. In Proceedings of the ACM/IEEE conference on SuperComputing (SC), page 34. IEEE Computer Society, 2005.Google Scholar
  21. 21.
    R. Gonzalez and M. Horowitz. Energy dissipation in general purpose microprocessors. IEEE Journal of Solid-State Circuits, 31(9):1277–1284, Sept. 1996.CrossRefGoogle Scholar
  22. 22.
    P. Grosse, Y. Durand, and P. Feautrier. Methods for power optimization in SOC-based data flow systems. ACM Trans. Des. Autom. Electron. Syst., 14:38:1–38:20, June 2009.Google Scholar
  23. 23.
    Y. Hotta, M. Sato, H. Kimura, S. Matsuoka, T. Boku, and D. Takahashi. Profile-based optimization of power performance by using dynamic voltage scaling on a pc cluster. In Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS), page 340, Los Alamitos, CA, USA, 2006. IEEE Computer Society Press.Google Scholar
  24. 24.
    Intel XScale technology. http://www.intel.com/design/intelxscale.
  25. 25.
    T. Ishihara and H. Yasuura. Voltage scheduling problem for dynamically variable voltage processors. In Proceedings of International Symposium on Low Power Electronics and Design (ISLPED), pages 197–202. ACM Press, 1998.Google Scholar
  26. 26.
    R. Jejurikar, C. Pereira, and R. Gupta. Leakage aware dynamic voltage scaling for real-time embedded systems. In Proceedings of the 41st annual Design Automation Conference (DAC), pages 275–280, New York, NY, USA, 2004. ACM.Google Scholar
  27. 27.
    K. Kalpakis, K. Dasgupta, and O. Wolfson. Optimal placement of replicas in trees with read, write, and storage costs. IEEE Trans. Parallel and Distributed Systems, 12(6):628–637, 2001.CrossRefGoogle Scholar
  28. 28.
    H. Kawaguchi, G. Zhang, S. Lee, and T. Sakurai. An LSI for VDD-Hopping and MPEG4 System Based on the Chip. In Proceedings of the International Symposium on Circuits and Systems (ISCAS), May 2001.Google Scholar
  29. 29.
    K. H. Kim, R. Buyya, and J. Kim. Power-Aware Scheduling of Bag-of-Tasks Applications with Deadline Constraints on DVS-enabled Clusters. In Proceedings of the IEEE International Symposium on Cluster Computing and the Grid (CCGRID), pages 541–548, May 2007.Google Scholar
  30. 30.
    K. Lahiri, A. Raghunathan, S. Dey, and D. Panigrahi.: a new frontier in low power design. In Proceedings of the 7th Asia and South Pacific Design Automation Conference and the 15th International Conference on VLSI Design (ASP-DAC), pages 261–267, 2002.Google Scholar
  31. 31.
    P. Langen and B. Juurlink. Leakage-aware multiprocessor scheduling. J. Signal Process. Syst., 57(1):73–88, 2009.CrossRefGoogle Scholar
  32. 32.
    S. Lee and T. Sakurai. Run-time voltage hopping for low-power real-time systems. In Proceedings of DAC'2000, the 37th Conference on Design Automation, pages 806–809, 2000.Google Scholar
  33. 33.
    P. Liu, Y.-F. Lin, and J.-J. Wu. Optimal placement of replicas in data grid environments with locality assurance. In International Conference on Parallel and Distributed Systems (ICPADS). IEEE Computer Society Press, 2006.Google Scholar
  34. 34.
    S. Miermont, P. Vivet, and M. Renaudin. A Power Supply Selector for Energy- and Area-Efficient Local Dynamic Voltage Scaling. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, volume 4644 of Lecture Notes in Computer Science, pages 556–565. Springer Berlin / Heidelberg, 2007.Google Scholar
  35. 35.
    M. P. Mills. The internet begins with coal. Environment and Climate News, page., 1999.Google Scholar
  36. 36.
    T. Okuma, H. Yasuura, and T. Ishihara. Software energy reduction techniques for variablevoltage processors. IEEE Design Test of Computers, 18(2):31–41, Mar. 2001.CrossRefGoogle Scholar
  37. 37.
    R. B. Prathipati. Energy efficient scheduling techniques for real-time embedded systems. Master’s thesis, Texas A&M University, May 2004.Google Scholar
  38. 38.
    K. Pruhs, R. van Stee, and P. Uthaisombut. Speed scaling of tasks with precedence constraints. Theory of Computing Systems, 43:67–80, 2008.CrossRefzbMATHMathSciNetGoogle Scholar
  39. 39.
    V. J. Rayward-Smith, F. W. Burton, and G. J. Janacek. Scheduling parallel programs assuming preallocation. In P. Chrétienne, E. G. Coffman Jr., J. K. Lenstra, and Z. Liu, editors, Scheduling Theory and its Applications. John Wiley and Sons, 1995.Google Scholar
  40. 40.
    A. Schrijver. Combinatorial Optimization: Polyhedra and Efficiency, volume 24 of Algorithms and Combinatorics. Springer-Verlag, 2003.Google Scholar
  41. 41.
    J. A. Stankovic, K. Ramamritham, and M. Spuri. Deadline Scheduling for Real-Time Systems: EDF and Related Algorithms. Kluwer Academic Publishers, Norwell, MA, USA, 1998.CrossRefzbMATHGoogle Scholar
  42. 42.
    L. Wang, G. von Laszewski, J. Dayal, and F. Wang. Towards Energy Aware Scheduling for Precedence Constrained Parallel Tasks in a Cluster with DVFS. In Proceedings of the IEEE/ACM International Conference on Cluster, Cloud and Grid Computing (CCGRID), pages 368–377, May 2010.Google Scholar
  43. 43.
    J.-J. Wu, Y.-F. Lin, and P. Liu. Optimal replica placement in hierarchical Data Grids with locality assurance. Journal of Parallel and Distributed Computing (JPDC), 68(12):1517–1538, 2008.CrossRefGoogle Scholar
  44. 44.
    R. Xu, D. Mossé, and R. Melhem. Minimizing expected energy consumption in real-time systems through dynamic voltage scaling. ACM Trans. Comput. Syst., 25(4):9, 2007.CrossRefzbMATHGoogle Scholar
  45. 45.
    L. Yang and L. Man. On-Line and Off-Line DVS for Fixed Priority with Preemption Threshold Scheduling. In Proceedings of the International Conference on Embedded Software and Systems (ICESS), pages 273–280, May 2009.Google Scholar
  46. 46.
    F. Yao, A. Demers, and S. Shenker. A scheduling model for reduced CPU energy. In Proceedings of the 36th Annual Symposium on Foundations of Computer Science (FOCS), page 374, Washington, DC, USA, 1995. IEEE Computer Society.Google Scholar
  47. 47.
    Y. Zhang, X. S. Hu, and D. Z. Chen. Task scheduling and voltage selection for energy minimization. In Proceedings of the 39th annual Design Automation Conference (DAC), pages 183–188, New York, NY, USA, 2002. ACM.Google Scholar
  48. 48.
    D. Zhu, R. Melhem, and D. Mossé. The effects of energy management on reliability in real-time embedded systems. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 35–40, 2004.Google Scholar

Copyright information

© Springer Science+Business Media New York 2015

Authors and Affiliations

  • Guillaume Aupy
    • 1
    Email author
  • Anne Benoit
    • 1
    • 2
  • Paul Renaud-Goud
    • 3
  • Yves Robert
    • 1
    • 2
    • 4
  1. 1.LIP, Ecole Normale Supérieure de LyonLyonFrance
  2. 2.Institut Universitaire de FranceParisFrance
  3. 3.Chalmers University of technologyGothenburgSweden
  4. 4.University Tennessee KnoxvilleKnoxvilleUSA

Personalised recommendations