An Integer Linear Programming Approach to General Fault Covering Problems
The probability of having defective elements in a chip increases as chip density increases. One way to increase the yield in chip production is to use reconfigurable chips in which there are redundant elements that can be used to replace the defective elements. The fault covering problem is to assign redundant elements to replace the defective elements such that the chip will function properly. A general formulation to represent the relationship between redundant elements and defective elements in a uniform way was presented in [HaCL88]. Such a formulation subsumes many of the formulations discussed in previous studies. In this paper, we give a general algorithm for the solution of fault covering problems in the general formulation. We transform these problems into integer linear programming problems. The general integer linear programming problem is a well studied combinatorial optimization problem for which there are known methods of solution. To demonstrate the effectiveness of the integer linear programming approach, we studied three different fault covering problems, namely, the fault covering problems for redundant RAMs, the fault covering problems for arrays of RAMs with shared spares, and the fault covering problems for arrays of processors. Our method achieves very good results. It produces optimal solutions using the minimum number of redundant elements. Also, the computation times of our method for all test examples are very short.
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- [Evan81]R.C. Evans, “Testing Repairable RAMs and Mostly Good Memories,” Proc. IEEE Int. Test Conference, pp. 49-55, 1981.Google Scholar
- [HaCL88]N. Hasan, J. Cong, and C.L. Liu, “A New Formulation of Yield Enhancement Problems for Reconfigurable Chips,” Proc. Intl. Conf. on Computer Aided Design, Nov. 1988.Google Scholar
- [HaDa87]R.W. Haddad, A.T. Dahbura, “Increased Throughput for the Testing and Repair of RAMs with Redundancy,” Proc. IEEE Intl. Conf. on Computer-Aided Design, pp. 230-233, 1987.Google Scholar
- [PaRa88]R.G. Parker and R.L. Rardin, Discrete Optimization, unpublished manuscript.Google Scholar
- [PaSt82]C.H. Papadimitriou and K. Steiglitz, Combinatorial Optimization, Algorithms and Complexity, Prentice-Hall, Inc., 1982.Google Scholar
- [Schr87]L. Schrage, User’s Manual for Linear Integer and Quadratic Programming with LINDO, Scientific Press, 1987.Google Scholar
- [Sing88]A.D. Singh, “Interstitial Redundancy: An Area Efficient Fault Tolerance Scheme for Large Area VLSI Processor Arrays,” IEEE Trans. on Computers, Nov. 1988.Google Scholar
- [TaBM84]M. Tarr, D. Boudreau, and R. Murphy, “Defect Analysis System Speeds Test and Repair of Redundant Memories,” Electronics, pp. 175-179, Jan. 12, 1984.Google Scholar
- [WeLo87]C.L. Wey and F. Lombardi, “On the Repair of Redundant RAM’s,” IEEE Trans. on Computer-Aided Design, Vol. Cad-6, No. 2, pp. 222–231, March 1987.Google Scholar