Abstract
Historically, VLSI designers have used circuit speed as the “performance” metric. Large gains, in terms of performance and silicon area, have been made for digital processors, microprocessors, DSPs (Digital Signal Processors), ASICs (Application Specific ICs), etc. In general, “small area” and “high performance” are two conflicting constraints. The IC designers’ activities have been involved in trading off these constraints. Power dissipation issue was not a design criterion but an afterthought. In fact, power considerations have been the ultimate design criteria in special portable applications such as wristwatches and pacemakers for a long time. The objective in these applications was minimum power for maximum battery life time.
Keywords
Power Dissipation Power Saving Power Reduction VLSI System VLSI CMOSPreview
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