CRAY-2 Memory Organization and Interprocessor Memory Contention

  • Robert W. Numrich
Conference paper
Part of the The IMA Volumes in Mathematics and its Applications book series (IMA, volume 48)

Abstract

This paper describes a simulation study of interprocessor memory contention for a shared memory, vector multiprocessor like the CRAY-2. When programs execute together on such a system, each program’s performance, relative to its performance on a single dedicated processor, degrades because of contention among processors for shared memory. From the results of the simulation study, the paper proposes analytic forms for the asymptotic steady state behavior of throughput, time delay, and efficiency as functions of hardware parameters. The results suggest criteria for evaluating hardware designs and an index of quality for comparing different designs.

Keywords

System Time Delay System Throughput Clock Period Memory Bank Request Rate 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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Copyright information

© Springer-Verlag New York, Inc. 1993

Authors and Affiliations

  • Robert W. Numrich
    • 1
  1. 1.Software DivisionCray Research, Inc.EaganUSA

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