Interconnect-Area Estimation for Macro Cell Placements
Chapter
Abstract
In Chapter 3 it was shown that simulated annealing was an effective algorithm upon which to base a standard cell placement and global routing package. Furthermore, in Chapter 4 it was shown that simulated annealing was also effective for the generalized macro/custom cell placement problem. For this latter layout style, the cells are permitted to have any rectilinear shape. Furthermore, the cells may have fixed geometry including pin locations (macro cells) or the cells may have an estimated area with a specified aspect-ratio range, and with pins that need to be placed (custom cells).
Preview
Unable to display preview. Download preview PDF.
References
- 1.J. Burns and R. Newton, “SP ARCS: A New Constraint-Based 1C Symbolic Layout Spacer,” (1986).Google Scholar
- 1.W. Heller, W. Mikhail, and W. Donath, “Prediction of Wiring Space Requirements for LSI,” (1978).Google Scholar
- 2.A. El Gamal and Z. Syed, “A Stochastic Model for Interconnections in Custom Integrated Circuits,” (1981).Google Scholar
Copyright information
© Kluwer Academic Publishers, Boston 1988