Basics

Abstract

This chapter presents a broad view of some of the most important features of VHDL. The first section introduces the notions of structure and behavior and describes in very general terms how these notions relate to various VHDL features, including the VHDL signal, entity declaration, architecture body, process statement and component instantiation statement VHDL permits designers to declare a virtually unlimited number of data types for characterizing the values held by signals, variables, and constants. The second section of this chapter explains how several basic types and objects are declared. VHDL’s system of types is a complex subject; a detailed discussion of type and subtype declarations is contained in a separate chapter (Chapter 4). Modularity of design is a persistent theme in VHDL. The third section explains a fundamental mechanism underlying modularity: how a designer specifies interfaces to major constructs and how he connects constructs at their interfaces. The fourth section discusses the internal structure of several of the major VHDL constructs. The last section gives a brief overview of VHDL libraries and explains what determines a proper “order of analysis” for a set of library units.