Chapter

Handbook of Signal Processing Systems

pp 69-101

Date:

Signal Processing for High-Speed Links

  • Naresh ShanbhagAffiliated withUniversity of Illinois at Urbana-Champaign Email author 
  • , Andrew SingerAffiliated withUniversity of Illinois at Urbana-Champaign
  • , Hyeon-min BaeAffiliated withKAIST

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Abstract

The steady growth in demand for bandwidth has resulted in data-rates in the 10s of Gb/s in back-plane and optical channels. Such high-speed links suffer from impairments such as dispersion, noise and nonlinearities. Due to the difficulty in implementing multi-Gb/s transmitters and receivers in silicon, conventionally, high-speed links were implemented primarily with analog circuits employing minimal signal processing. However, the relentless scaling of feature sizes exemplified by Moore’s Law has enabled the application of sophisticated signal processing techniques to both back-plane and optical links employing mixed analog and digital architectures and circuits. As a result, over the last decade, signal processing has emerged as a key technology to the advancement of low-cost, high data-rate, backplane and optical communication systems. In this chapter, we provide an overview of some of the driving factors that limit the performance of high-speed links, and highlight some of the potential opportunities for the signal processing and circuits community to make substantial contributions in the modeling, design and implementation of these systems.