SiC Planar MOSFET Structures

  • B. Jayant Baliga


In Chap. 1, it was demonstrated that the specific on-resistance of power MOSFET devices can be greatly reduced by replacing silicon with wide band gap semiconductors. Among wide band gap semiconductors, the most progress with creating power MOSFET structures has been achieved using silicon carbide. Silicon carbide power device structures have been discussed in detail in a previous book [1]. In that book, it was shown that the conventional planar power D-MOSFET structure, developed and widely utilized for silicon, is not suitable for the development of silicon carbide devices. Two problems are encountered when utilizing the conventional power D-MOSFET structure for silicon carbide. The first problem is the much larger threshold voltage required to create an inversion layer in silicon carbide due to its much greater band gap. The doping concentration required in the P-base region to achieve a typical threshold voltage of 2 V is so low that the device cannot sustain a high blocking voltage due to reach-through of the depletion layer in the base region. The second problem is the very high electric field generated in the gate oxide because the electric field in the silicon carbide drift region under the gate is an order to magnitude larger than for silicon devices. This leads to rupture of the gate oxide at large blocking voltages.


Threshold Voltage Gate Voltage Gate Oxide Gate Bias Drain Voltage 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    B.J. Baliga, “Silicon Carbide Power Devices”, World Scientific, Singapore, 2005.Google Scholar
  2. 2.
    B.J. Baliga, “Silicon Carbide Semiconductor Devices having Buried Silicon Carbide Conduction Barrier Layers Therein”, U. S. Patent 5,543,637, Issued August 6, 1996.Google Scholar
  3. 3.
    B.J. Baliga, “Fundamentals of Power Semiconductor Devices”, Springer-Science, New York, 2008.CrossRefGoogle Scholar
  4. 4.
    S. Sridevan and B.J. Baliga, “Lateral N-channel Inversion Mode 4H-SiC MOSFETs”, IEEE Electron Device Letters, Vol. 19, pp. 228–230, 1998.CrossRefGoogle Scholar
  5. 5.
    S.H. Ryu, et al., “10-kV 5-A 4H-SiC Power DMOSFET”, IEEE International Symposium on Power Semiconductor Devices, Abstract 7.2, pp. 265–268, 2006.Google Scholar
  6. 6.
    P.M. Shenoy and B.J. Baliga, “The Planar 6H-SiC ACCUFET”, IEEE Electron Device Letters, Vol. 18, pp. 589–591, 1997.CrossRefGoogle Scholar
  7. 7.
    N. Thapar and B.J. Baliga, “Analytical Model for the Threshold Voltage of Accumulation Channel MOS-Gated Devices”, Solid State Electronics, Vol. 42, pp. 1975–1979, 1998.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  • B. Jayant Baliga
    • 1
  1. 1.Department of Electrical and Computer EngineeringNorth Carolina State UniversityRaleighUSA

Personalised recommendations