Embedded Vertex Shader in FPGA

  • Lars Middendorf
  • Felix Mühlbauer
  • Georg Umlauf
  • Christophe Bobda
Part of the IFIP – The International Federation for Information Processing book series (IFIPAICT, volume 231)


Embed System Clock Speed Instruction Memory Hardware Accelerator Arithmetic Unit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



  1. [1]
    Jerald Yoo Ju-Ho Sohn, Jeong-Ho Woo and Hoi-Jun Yoo. Design and test of fixed-point multimedia co-processor for mobile applications. In DATE 2006, 2006.Google Scholar
  2. [2]
    Leif Kobbelt. Special effects SS05, 2005. sfx/ [date: 09/12/2006].
  3. [3]
    Chris Lomont. Fast inverse square root, 2003.∼clomont/Math/Papers/2003/InvSqrt.pdf [date: 2003].
  4. [4]
    Microsoft Corporation. Directx sdk, 2006. [date: 09/12/2006].
  5. [5]
    Iain Richardson. H.264 and MPEG-4 - video compression. Wiley, 2003.Google Scholar
  6. [6]
    Henry Styles and Wayne Luk. Customising graphics applications: Techniques and programming interface. In IEEE Symposium on Field-Programmable Custom Computing Machines 2000, 2000.Google Scholar
  7. [7] Bitboys introduces vector graphics processor for mobile devices at game developers conference., 2005.
  8. [8]
    David Thomas and Wayne Luk. Implementing Graphics Shaders Using FPGAs, page 1173. Lecture Notes in Computer Science. Springer Berlin / Heidelberg, 2004.Google Scholar

Copyright information

© International Federation for Information Processin 2007

Authors and Affiliations

  • Lars Middendorf
  • Felix Mühlbauer
  • Georg Umlauf
  • Christophe Bobda

There are no affiliations available

Personalised recommendations