IMYCS 1986: Trends, Techniques, and Problems in Theoretical Computer Science pp 1-25 | Cite as
Lower bound techniques for VLSI algorithms
Chapter 1 VLSI And Formal Languages
First Online:
Keywords
Problem Instance Information Transfer Communication Complexity VLSI Circuit Boolean Circuit
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
Preview
Unable to display preview. Download preview PDF.
References
- 1.Abelson,H.: Lower bounds on information transfer in distributed computations. Proc. 19th Annual IEEE FOCS, IEEE 1978, pp. 151–158.Google Scholar
- 2.Aho,A.V. — Ullman,J.D. — Yanakakis,M.: On notions of information transfer in VLSI circuits. Proc. 15th ACM STOC, ACM 1983, pp. 133–139.Google Scholar
- 3.Bačík, M.: Closure properties of communication complexity. ŠVOČ 1987, 1, section Theoretical Cybernetics and Mathematical Informatics, Comenius University, Bratislava 1987, 12p. (in Slovak).Google Scholar
- 4.Baudet,G.M.: On the area required by VLSI circuits. In: Kung, Sproul, and Steele 1981, pp. 100–107.Google Scholar
- 5.Brent, R.P. — Goldschlager, L.M.: Some area time tradeoffs for VLSI. SIAM J. Comput. 11, No.4 (1982), pp. 737–747.Google Scholar
- 6.Brent,R.P. — Kung,H.T.: The chip complexity of binary arithmetic. Proc. 12th Annual ACM STOC, ACM 1980, pp. 190–200.Google Scholar
- 7.Culik, K.II. — Gruska, J. — Salomaa, A.: Systolic automata for VLSI on balanced trees. Acta Informat. 18 (1983), 335–344.Google Scholar
- 8.Culik, K.II. — Gruska, J. — Salomaa, A.: On a family of L languages resulting from systolic tree automata. Theor. Comp. Sci. 23 (1983), 231–242.Google Scholar
- 9.Ďuriš,P. — Galil,Z. — Schnitger,G.: Lower bounds on communication complexity. Proc. 15th Annual ACM STOC, ACM 1984, pp. 81–91.Google Scholar
- 10.Ďuriš, P. — Sýkora, O. — Vrťo, I. — Thompson, C.D.: Tight chip lower bounds for discrete Fourier and Walsh-Hadamard transformations. Infor. Proces. Let. 21 (1985), 245–247.Google Scholar
- 11.Gruska, J.: Systolic automata — power, characterizations, nonhomogenity. Proc. 11th MFCS '84, Lect. Notes in Computer Science 176, Springer-Verlag, Berlin Heidelberg-New York 1984, pp. 32–49.Google Scholar
- 12.Gubáš, X. — Waczulík, J.: Closure properties of the family of languages defined ba communication complexity. ŠVOČ 1986, 1, section Theoretical Cybernetics and Mathematical Informatics, Comenius University, Bratislava 1986, 26p. (in Slovak).Google Scholar
- 13.Gubáš, X. — Waczulík, J.: Closure properties of the complexity measures A and AT2. ŠVOČ 1987, 1, section VLSI and Computer Graphics. Comenius University, Bratislava 1987, 25p. (in Slovak).Google Scholar
- 14.Hromkovič, J.: Communication complexity. Proc. 11th ICALP, Lect. Notes in Computer Science 172, Springer-Verlag, Berlin-Heidelberg-New York 1984, pp. 235–246.Google Scholar
- 15.Hromkovič, J.: Relation between Chomsky hierarchy and communication complexity hierarchy. Acta Math. Univ. Com. 47–48 (1986).Google Scholar
- 16.Hromkovič, J.: Normed protocol and communication complexity. Computers AI 3, No.5 (1984), 415–422.Google Scholar
- 17.Hromkovič, J.: Linear lower bounds on unbounded fan-in Boolean circuits. Infor. Proces. Let. 21 (1985), 71–74.Google Scholar
- 18.Hromkovič, J.: A new approach to defining the communication complexity for VLSI. Proc. 12th MFCS '86, Lect. Notes in Computer Science 233, Springer-Verlag, Berlin-Heidelberg-New York 1986, pp. 431–439.Google Scholar
- 19.Hromkovič,J. — Ložkin,C.A. — Rybko,A.N. — Sapoženko,A.A. — Škalikova, N.A.: An approach to obtaining lower bounds on space of Boolean circuits. Banach Centre publ., to appear (In Russian).Google Scholar
- 20.Hromkovič,J.: Some complexity aspects of VLSI computations, Part 1.: A framework for the study of information transfer in VLSI circuits. Submitted to Computers AI.Google Scholar
- 21.Hromkovič,J.: Some complexity aspects of VLSI computations. Part 2.: Topology of circuits and information transfer. Submitted to Computers AI.Google Scholar
- 23.Hromkovič,J.: Some complexity aspects of VLSI computations. Part 5.: Nondeterministic and probabilistic VLSI circuits. Submitted to Computer AI.Google Scholar
- 24.Hromkovič,J. — Pardubská,A.: Some complexity aspects of VLSI computations. Part 3.: On the power of input bit permutation in tree and trellis automata. Submitted to Computers AI.Google Scholar
- 24.Ja 'Ja, J. — Prasanna Kumar, V.K. — Simon, J.: Information transfer under different sets of protocols. SIAM J. Comput. 13, No.4 (1984), 840–849.Google Scholar
- 25.Kurcabová, V.: Communication complexity. Master thesis, Dept. of Theor. Cybernetics, Comenius University, Bratislava 1985 (in Slovak).Google Scholar
- 26.Leiserson,C.E.: Area efficient graph algorithms (for VLSI). Proc. 21st Annual IEEE FOCS, IEEE 1980, pp. 270–281.Google Scholar
- 27.Leiserson, C.E.: Area efficient VLSI computations. MIT Press, Cambridge 1983, Mass.Google Scholar
- 28.Lipton,R.J. — Sedgewick,R.: Lower bounds for VLSI. Proc. 13th Annual ACM STOC, ACM 1981, pp. 300–307.Google Scholar
- 29.Masek,W.: A fast algorithm for string editing problem and decision graph complexity. M.Sc. thesis, MIT, May 1976.Google Scholar
- 30.Papadimitriou, C.H. — Sipser, M.: Communication complexity. J.Comp. Syst. Sci. 28 (1984), 260–269.Google Scholar
- 31.Preparata,F.P.: A mesh-connected area-time optimal VLSI integer multiplier. In: Kung, Sproull, and Steele 1981, pp. 311–316.Google Scholar
- 32.Preparata, F.P. — Vuilemin, J.E.: Area-time optimal VLSI networks for multiplying matrices. Infor. Proces. Let. 11, No.2 (1980), 77–80.Google Scholar
- 33.Preparata, F.P. — Vuilemin, J.E.: Area-time optimal VLSI networks for computing integer multiplication and discrete Fourier transformation. Proc. 8th ICALP '81, Lect. Notes in Computer Science 115, Springer-Verlag, Berlin-Heidelberg-New York 1981, pp. 29–40.Google Scholar
- 34.Pudlák,P.: personal communication.Google Scholar
- 35.Pudlák,P. — Žák,S.: Space complexity of computations. Unpublished manuscript, 1982.Google Scholar
- 36.Salomaa,A.: Systolic tree and trellis automata. Proc. Collq. ACLCS, Gyor 1984.Google Scholar
- 37.Savage,J.E.: Planar circuit complexity and the performance of VLSI algorithms. In: Kung, Sproul, and Steele, 1981, pp. 61–67.Google Scholar
- 38.Savage,J.E.: Area-time tradeoffs for mutrix multiplication and related problems in VLSI models. J. Comp. Syst. Sci. 20, No.3, pp. 230–242.Google Scholar
- 39.Škalikova,N.A.: On the area complexity of Boolean circuits computing some specific functions. Sbornik rabot po matematičeskoj kibernetike I (1976), Comp. Centre of the Academy of Sciences of USSR, pp. 102–115 (in Russian).Google Scholar
- 40.Škalikova,N.A.: On the relation between area and space complexity of Boolean circuits. Metody diskretnogo analiza v ocenkach zložnosti upravľajuščich sistem 38, Novosibirsk 1982, pp. 87–107 (in Russian).Google Scholar
- 41.Thompson,C.D.: Area-time complexity for VLSI. Proc. 11th Annual ACM STOC, ACM 1979, pp. 81–88.Google Scholar
- 42.Thompson, C.D.: A Complexity Theory for VLSI. Doctoral dissertation, CMU-CS-80-140, Computer Sci. Dept., Carnegie — Mellon University, Pittsburg, August 1980, 131p.Google Scholar
- 43.Ullman,A.C.: Computational Aspects of VLSI. Computer SCience Press 1984, 495p.Google Scholar
- 44.Yao,A.C.: Some complexity questions related to distributed computing. Proc. 11th Annual ACM STOC, ACM 1979, pp. 209–213.Google Scholar
- 35.Yao,A.C.: The entropic limitations of VLSI computations. Proc. 13th Annual ACM STOC, ACM 1981, pp. 308–311.Google Scholar
Copyright information
© Springer-Verlag Berlin Heidelberg 1987