A parallel algorithm for minimum cost path computation on polymorphic processor array
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh interconnection network. The proposed algorithm has been implemented using the Polymorphic Parallel C language and has been validated through simulation. The proposed algorithm for the Polymorphic Processor Array, delivers the same performance, in terms of computational complexity, as the hypercube interconnection network of the Connection Machine, and as the Gated Connection Network.
KeywordsInterconnection Network Processor Array Minimum Cost Path Destination Vertex Connection Machine
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