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Parallel software caches

  • Arno Formella
  • Jörg Keller
Systems and Applications
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1253)

Abstract

We investigate the construction and application of parallel software caches in shared memory multiprocessors. To re-use intermediate results in time-consuming parallel applications, all threads store them in, and try to retrieve them from, a common data structure called parallel software cache. This is especially advantageous in irregular applications where re-use by scheduling at compile time is not possible. A parallel software cache is based on a readers/writers lock, i. e., multiple threads may read simultaneously but only one thread can alter the cache after a miss. To increase utilization, the cache has a number of slots that can be updated separately. We analyze the potential performance gains of parallel software caches and present results from two example applications.

Keywords

Shared Memory Replacement Strategy Cache Size Sequential Program Address Function 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • Arno Formella
    • 1
  • Jörg Keller
    • 2
  1. 1.FB 14 InformatikUniversität des SaarlandesSaarbrückenGermany
  2. 2.FB InformatikFernUniversität-GHSHagenGermany

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