Refining interval temporal logic specifications

  • Antonio Cau
  • Hussein Zedan
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1231)


Interval Temporal Logic (ITL) was designed as a tool for the specification and verification of systems. The development of an executable subset of ITL, namely Tempura, was an important step in the use of temporal logic as it enables the developer to check, debug and simulate the design. However, a design methodology is missing that transforms an abstract ITL specification to an executable (concrete) Tempura program. The paper describes a development technique for ITL based on refinement calculus. The technique allows the development to proceed from high level “abstract” system specification to low level “concrete” implementation via a series of correctness preserving refinement steps. It also permits a mixture of abstract specification and concrete implementation at any development step.

To allow the development of such a technique, ITL is extended to include modularity, resources and explicit communication. This allows synchronous, asynchronous and shared variable concurrency to be explicitly expressed. These constructs also help in solving the problems, like lack of expressing modularity, timing and communication, discovered during the use of ITL and Tempura for a large-scale application [2].


Communication Link Parallel Composition Sporadic Task Interval Temporal Logic Property Join 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1997

Authors and Affiliations

  • Antonio Cau
    • 1
  • Hussein Zedan
    • 1
  1. 1.Science and Engineering Research Centre, Department of Computer ScienceDe Montfort UniversityLeicesterUK

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