Tamper resistant software: an implementation
This paper describes a technology for the construction of tamper resistant software. It presents a threat model and design principles for countering a defined subset of the threat. The paper then presents an architecture and implementation of tamper resistant software based on the principles described.
The architecture consists of segment of code, called an Integrity Verification Kernel, which is self-modifying, self-decrypting, and installation unique. This code segment communicates with other such code segments to create an Interlocking Trust model.
The paper concludes with speculation of additional uses of the developed technology and an evaluation of the technology's effectiveness.
KeywordsTrojan Horse Lower Memory Secret Component Threat Model Code Segment
Unable to display preview. Download preview PDF.
- Kocher, P. Cryptanalysis of Diffie-Hellman, RSA, DSS, and Other Systems Using Timing Attacks. Private Extended Abstract, 7 December 1995.Google Scholar