RaPiD — Reconfigurable pipelined datapath

  • Carl Ebeling
  • Darren C. Cronquist
  • Paul Franklin
High-Level Design II
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1142)


Configurable computing has captured the imagination of many architects who want the performance of application-specific hardware combined with the reprogrammability of general-purpose computers. Unfortunately, onfigurable computing has had rather limited success largely because the FPGAs on which they are built are more suited to implementing »ndom logic than computing tasks. This paper presents RaPiD, a new coarse-grained FPGA architecture that is optimized for highly repetitive, computation-intensive tasks. Very deep application-specific computation pipelines can be configured in RaPiD. These pipelines make much more efficient use of silicon than traditional FPGAs and also yield much higher performance for a wide range of applications.


Functional Unit Systolic Array Control Path Configurable Computing Configurable Pipeline 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1996

Authors and Affiliations

  • Carl Ebeling
    • 1
  • Darren C. Cronquist
    • 1
  • Paul Franklin
    • 1
  1. 1.Department of Computer Science and EngineeringUniversity of WashingtonSeattle

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