CSL

Controller synthesis and verification: A case study
  • Klaus Nökel
  • Klaus Winkelmann
Chapter
Part of the Lecture Notes in Computer Science book series (LNCS, volume 891)

Abstract

CSL (Control Specification Language) is a declarative language for specifying structure and behavior of finite-state systems. We generated a controller for the production cell which was verified using SVE (System Verification Environment), a symbolic model checker. We were able to verify all demanded safety properties, and in addition a substantial set of liveness properties. Model checking also revealed a subtle error in the original design of the controller.

From the good performance results of our experiments we conclude that current techniques can handle realistic problems of complexity well beyond the one represented by the production cell.

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References

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    A. Benveniste, G. Berry: Real Time Systems Design and Programming, in Proc. of the IEEE, vol. 9, no. 9, September 1991Google Scholar
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    J.R. Burch, E.M. Clarke, K.L. McMillan, D.L. Dill, L.J. Hwang, Symbolic Model Checking: 10 20 States and Beyond, Information and Computation June 1992, vol. 98, pp 142–170.Google Scholar
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    Th. Filkorn, H.-A. Schneider, A. Scholz, A. Strasser, P. Warkentin, SVE System Verification Environment, to appearGoogle Scholar
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    W. Hamscher, L. Console, J. de Kleer (eds.): Readings in Model-Based Reasoning, Morgan Kaufmann, 1992Google Scholar
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    D.S. Weld, J. de Kleer (eds.): Readings in Qualitative Reasoning about Physical Systems, Morgan Kaufmann, 1990Google Scholar

Copyright information

© Springer-Verlag 1995

Authors and Affiliations

  • Klaus Nökel
    • 1
  • Klaus Winkelmann
    • 1
  1. 1.Corporate Research and DevelopmentSiemens AGUSA

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