Implementing on line arithmetic on PAM

  • Marc Daumas
  • Jean-Michel Muller
  • Jean Vuillemin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 849)


On line arithmetic is a computation tool able to adapt to the precision expected by the user. Developing a library of on line operators for FPGAs will lead in a near future to the spread of brick-assembled application-dedicated operators. In the implementation of the basic arithmetic operations (addition, multiplication, division and square root), we have met some new problems: our work has involved changes in the VLSI design methodology in order to achieve some effective performances. We shall present the modified on-line algorithms and their adaptation to the cell oriented FPGA architecture. The correct integration of some retiming barriers has proved to be critical as far as speed is concerned.


Clock Cycle Logic Cell Correct Integration Reset Signal Root Operation 
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Copyright information

© Springer-Verlag Berlin Heidelberg 1994

Authors and Affiliations

  • Marc Daumas
    • 1
  • Jean-Michel Muller
    • 1
  • Jean Vuillemin
    • 2
  1. 1.Laboratoire de l'Informatique du Parallélisme-CNRSÉcole Normale Supérieure de LyonLyonFrance
  2. 2.Paris Research LaboratoryDigital Equipment Corporation Rueil MalmaisonFrance

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